th May 2012 www.semtech.com 20 SX1501/SX1502/SX1503 4/8/16 Channel L" />
參數(shù)資料
型號： SX1503I091TRT
廠商： Semtech
文件頁數(shù)： 13/32頁
文件大?。?/td> 0K
描述： IC GPIO EXPANDER I2C 16CH 28-QFN
產(chǎn)品培訓(xùn)模塊： Low Voltage GPIO Expander Family
標(biāo)準(zhǔn)包裝： 1
接口： I²C
輸入/輸出數(shù)： 16
中斷輸出： 是
頻率 - 時鐘： 400kHz
電源電壓： 1.2 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 28-UFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 28-QFN（4x4）
包裝： 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面： 1359 (CN2011-ZH PDF)
其它名稱： SX1503I091DKR
WIRELESS & SENSING
Rev 11 – 16
th May 2012
www.semtech.com
20
SX1501/SX1502/SX1503
4/8/16 Channel Low Voltage GPIO
5
CONFIGURATION REGISTERS
5.1
SX1501 4-channel GPIO
Address
Name
Description
Default
0x00
RegData
Data register
1111 1111
*
0x01
RegDir
Direction register
1111 1111
0x02
RegPullUp
Pull-up register
0000 0000
0x03
RegPullDown
Pull-down register
0000 0000
0x04
Reserved
Unused
XXXX XXXX
0x05
RegInterruptMask
Interrupt mask register
1111 1111
0x06
RegSenseHigh
Unused
XXXX XXXX
0x07
RegSenseLow
Sense register
0000 0000
0x08
RegInterruptSource
Interrupt source register
0000 0000
0x09
RegEventStatus
Event status register
0000 0000
0x10
RegPLDMode
PLD mode register
0000 0000
0x11
RegPLDTable0
PLD truth table 0
0000 0000
0x12
RegPLDTable1
Unused
XXXX XXXX
0x13
RegPLDTable2
PLD truth table 2
0000 0000
0x14
RegPLDTable3
Unused
XXXX XXXX
0x15
RegPLDTable4
Unused
XXXX XXXX
0xAB
RegAdvanced
Advanced settings register
0000 0000
*Bits set as output take “1” as default value.
Table 12 – SX1501 Configuration Registers Overview
Addr
Name
Default
Bits
Description
7:4
Reserved. Must be set to 1 (default value)
0x00
RegData
0xFF
3:0
Write: Data to be output to the output-configured IOs
Read: Data seen at the IOs, independent of the direction configured.
7:4
Reserved. Must be set to 1 (default value)
0x01
RegDir
0xFF
3:0
Configures direction for each IO.
0 : IO is configured as an output
1 : IO is configured as an input
7:4
Reserved. Must be set to 0 (default value)
0x02
RegPullUp
0x00
3:0
Enables the pull-up for each IO
0 : Pull-up is disabled
1 : Pull-up is enabled
7:4
Reserved. Must be set to 0 (default value)
0x03
RegPullDown
0x00
3:0
Enables the pull-down for each IO
0 : Pull-down is disabled
1 : Pull-down is enabled
0x04
Reserved
0xXX
7:0
Unused
7:4
Reserved. Must be set to 1 (default value)
0x05
RegInterruptMask
0xFF
3:0
Configures which [input-configured] IO will trigger an interrupt on NINT pin
0 : An event on this IO will trigger an interrupt
1 : An event on this IO will NOT trigger an interrupt
0x06
RegSenseHigh
0xXX
7:0
Unused
7:6
Edge sensitivity of I/O[3]
5:4
Edge sensitivity of I/O[2]
3:2
Edge sensitivity of I/O[1]
0x07
RegSenseLow
0x00
1:0
Edge sensitivity of I/O[0]
00 : None
01 : Rising
10 : Falling
11 : Both
7:4
Reserved. Must be set to 0 (default value)
0x08
RegInterruptSource
0x00
3:0
Interrupt source (from IOs set in RegInterruptMask)
0 : No interrupt has been triggered by this IO
1 : An interrupt has been triggered by this IO (an event as configured in relevant
RegSense register occured).
Writing '1' clears the bit in RegInterruptSource and in RegEventStatus.
When all bits are cleared, NINT signal goes back high.
0x09
0x00
7:4
Reserved. Must be set to 0 (default value)
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