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參數(shù)資料
| 型號： | STV9428 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | High Speed Multisynch On-Screen Display for Monitor(用于監(jiān)視器的屏上顯示) |
| 中文描述： | 高速M(fèi)ultisynch屏幕的顯示器顯示（用于監(jiān)視器的屏上顯示） |
| 文件頁數(shù)： | 8/20頁 |
| 文件大小： | 559K |
| 代理商： | STV9428 |
I.4.2 - Look-up Table Registers
Color look-up table [CLUT] is read/write RAM table.
Mapping address is described in Chapter I.3.2.
The CLUT is splitted in 2 blocks of 8 bytes. Each
byte contains foreground and background informa-
tions as described below :
SHA
BR
BG
BB
FL
FR
FG
FB
SHA
FL
BR, BG, BB : Background color
FR, FG, FB
: Foreground color
If SHA = 1 and BR = BG = BB = 0, the background
of the character is transparent.
Each block may store a different set of colors. One
block of colors may be used for the normal items
of the menu while the second block, with brighter
colors, may be used for selected items of the menu.
The block selection is done by programming bit
CLU3 of CLU[3:0] of the character descriptor
(see Table 1). It remains selected all the row long.
Bit CLU2, CLU1 and CLU0 of CLU[3:0] of the
character descriptor select the active color at the
beginning of the row.
The active color can be changed along the row,
using 8 control codes COL0 to COL7.
Each control code (COL0 to COL7) active a dedicated
color byte in the CLUT as described in Table 2.
Table 1 :
CLUT Block Selection
Code
Name
0
Col 0
1
Col 1
2
Col 2
3
Col 3
4
Col 4
5
Col 5
6
Col 6
7
Col 7
0
Col 0
1
Col 1
2
Col 2
3
Col 3
4
Col 4
5
Col 5
6
Col 6
7
Col 7
: Shadowing
: Flashing foreground
CLU3
CLU[2:0]
Ram
@(hex)
@3FE0
@3FE1
@3FE2
@3FE3
@3FE4
@3FE5
@3FE6
@3FE7
@3FE8
@3FE9
@3FEA
@3FEB
@3FEC
@3FED
@3FEE
@3FEF
Reset Value
(hex)
07
16
25
34
43
52
61
70
70
61
52
43
34
25
16
07
0
1
Table 2 :
CLUT Color Selection
Code
Name
COL1
COL2
Code Nbr
(h)
10
11
Color Look-up Table in
RAM
@ 3FE0 : Color 0
@ 3FE1 : Color 1
COL6
COL7
COL0
COL1
16
17
10
11
@ 3FE6 : Color 6
@ 3FE7 : Color 7
@ 3FE8 : Color 8
@ 3FE9 : Color 9
COL6
COL7
16
17
@ 3FEE : Color 14
@ 3FEF : Color 15
I.4.3 - Control Registers
LINE DURATION (Reset Value : 20h)
3FF0 VSP HSP LD6
LD5
LD4
LD3
LD2
LD1
VSP
: V-SYNC active edge selection
= 0, falling egde,
= 1, rising edge.
: H-SYNC active edge selection
= 0, falling egde,
= 1, rising edge.
LD[6:1] : LINE DURATION
LD0 = 0
LD1 = 2 periods of character
One character period is 12 pixels long.
HSP
TOP MARGIN (Reset Value : 60h)
3FF1
M8
M7
M6
M5
M4
M3
M2
M1
M[8:1] : TOP MARGIN height from the VSYNC reference
edge.
M0 = 0
M1 = 2 scan lines
Note :
The top margin is displayed before the first strip of descriptor
list. It can be black if FBK of DISPLAY CONTROL register is
set or transparent if FBK is clear.
HORIZONTAL DELAY (Reset Value : 20h)
3FF2 DD7 DD6 DD5 DD4 DD3 DD2 DD1 DD0
DD[7:0] : HORIZONTAL DISPLAY DELAY from the
HSYNC reference edge to the 1
st
pixel position
of the character strips.
Unit = 6 pixel periods. Minimum value is 08h.
First pixel position = [DD[7:0] - 6] x 6 + 54.
with DD[7:0] = 1,3,5 then the delay is 60 pixel.
FUNCTIONAL DESCRIPTION
(continued)
STV9427 - STV9428 - STV9429
8/20
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| STV9428-STV9429 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:HIGH SPEED MULTISYNCH ON-SCREEN DISPLAY FOR MONITOR |
| STV9429 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:HIGH SPEED MULTISYNCH ON-SCREEN DISPLAY FOR MONITOR |
| STV942X | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EVALUATION KIT OSD FOR MONITORS |
| STV9432 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:100MHz OSD FOR MONITOR |
| STV9432TA | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:100MHz OSD FOR MONITOR INCLUDING BEAM CURRENTS & VIDEO TIMING ANALYZER |
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