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參數(shù)資料
| 型號(hào)： | STV9421 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | MULTISYNC ON-SCREEN DISPLAY FOR MONITOR |
| 中文描述： | 多頻屏幕的監(jiān)視器顯示 |
| 文件頁(yè)數(shù)： | 8/16頁(yè) |
| 文件大?。?/td> | 228K |
| 代理商： | STV9421 |
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FUNCTIONAL DESCRIPTION
(continued)
The last fourth registers described below are only
availablewith the STV9421 :
PULSE WIDTH MODULATOR 1
3FF8
*
V1[7:0] : Digital value of the 1
st
PWM D to A
converter(Pin1).
V17
0
V16
0
V15
0
V14
0
V13
0
V12
0
V11
0
V10
0
PULSE WIDTH MODULATOR 2
3FF9
*
V2[7:0] : Digitalvalueof the2
d
PWMDAC(Pin11).
V27
0
V26
0
V25
0
V24
0
V23
0
V22
0
V21
0
V20
0
PULSE WIDTH MODULATOR 3
3FFA
*
V3[7:0] : Digital value of the 3
rd
PWM DAC
(Pin20).
V37
0
V36
0
V35
0
V34
0
V33
0
V32
0
V31
0
V30
0
PULSE WIDTH MODULATOR 4
3FFB
*
V4[7:0] : Digital value of the 4
th
PWM DAC
(Pin10).
Note :
* is power on reset value.
V47
0
V46
0
V45
0
V44
0
V43
0
V42
0
V41
0
V40
0
II - Descriptors
SPACING
MSB
0
-
-
-
-
-
-
-
LSB
SL[7:0] : The number of the scan lines of the
spacingstrip (1 to 255).
SL7
SL6
SL5
SL4
SL3
SL2
SL1
SL0
CHARACTER
MSB
1
DE
-
ZY
-
-
C9
C8
LSB
C[9:0] : The addressof the first charactercodeof
the strip(even).
DE
: Display enable :
- DE = 0, R = G = B = 0 and FBLK = FBK
(display control register) on whole strip,
- DE = 1, display of the characters.
ZY
: Zoom, ZY = 1 all the scan lines are
repeated once.
C7
C6
C5
C4
C3
C2
C1
0
III - Code Format
MSB
SET
CHARACTER NUMBER
LSB
FL : Flashing attribute (the flashing mode is
definedin theDISPLAYCONTROLregister).
BK3
BK2 BK1
BK0
FL
RF
GF
BF
SET
: The set CHARACTER NUMBER
- If SET= 0 : ROM character,
- If SET= 1 :
If CHARACTER NUMBER is 0 to
25, a user redefinable character
(UDC) located in RAM at the
address
equal
CHARACTER NUMBER,
If CHARACTER NUMBER is 26 to
63, spacecharacter,
If CHARACTER NUMBER >63,
end of line.
RF, GF, BF : Foreground color.
BK[3:0]
: Background:
- If BK3 = 0, BK[2:0] = background
color R, G andB,
- If BK3 = 1, shadowing:
BK2 : vertival shadowing,
BK1 : horizontal shadowing.
(if BK2 = BK1 = 0, the background is
transparent).
to
:
38
x
IV - Clock and Timing
The whole timing is derived from the XTALINand
the SYNCHRO (horizontal and vertival) input fre-
quencies.The XTALIN input frequency can be an
external clock or a crystal signal thanks to
XTALIN/XTALOUT pins. The value of this fre-
quencycan be chosenbetween8 and 15MHz, itis
availableon theCKOUT pinandis usedbythePLL
to generate a pixel clock locked on the horizontal
synchro input signal.
IV.1 - Horizontal Timing
The number of pixel periods is given by the LINE
DURATIONregister and is equal to :
[LD[5:0] + 1 ] x 12
(LD[5:0] : value of the LINE DURATION register).
This value allows to choosethe horizontalsize of
the characters.
The horizontal left margin is given by the HORI-
ZONTALDELAY registerand is equalto :
[DD[7:0] + 8] x 3 x t
PXCK
(DD[7:0] : value of the DISPLAY DELAY register
and T
PXCK
:pixel period).
This value allows to choosethe horizontalposition
of the characters on the screen. The value of
DD[7:0] must be equal or greater than 4 (the mini-
mum value of the horizontal delayis 36 x t
PXCK
= 3
character periods). The length of the active area,
where R,G, Bare differentfrom 0, dependson the
number of charactersof the strips.
STV9420 - STV9421
8/16
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