參數(shù)資料
型號(hào)： STV8236
廠商： 意法半導(dǎo)體
英文描述： Multistandard TV Audio Processor and Digital Sound Demodulator
中文描述： 多標(biāo)準(zhǔn)電視音頻處理器和數(shù)字聲音解調(diào)器
文件頁(yè)數(shù)： 31/97頁(yè)
文件大?。?/td> 1871K
代理商： STV8236
31/97
STV82x6
I2C Bus
8
I2C Bus
8.1
I2C Address and Protocol
The STV82x6 I2C interface works in Slave mode and is fully compliant with I2C standards in Fast
mode (maximum frequency of 400 kHz). Two pairs of I2C chip addresses are used to connect two
STV82x6 chips to the same I2C serial bus. The device address pairs are defined by the polarity of
the ADR pin and are listed in the following table:
Protocol Description
●
Write Protocol
●
Read Protocol
●
W = Write address,
●
R = Read address,
●
A = Acknowledge,
●
N = No acknowledge.
●
Sub-address is the register address pointer; this value auto-increments for both write and read.
The STV82x6 cannot immediately reply to an I2C read request when addressing DSP registers
(addresses 40h and greater).The I2C interface holds the I2C Serial Clock (SCL) line low before each
data byte is read to compensate for the latency of the DSP response (64 μs in worst case). The
implemented I2C Pulling Down mode is compatible with a Continuous or Stopped SCL when held
low (restart at high level, if stopped) and operates between 24 kHz and 400 kHz. If SCL Pulling
Down mode is not supported by the Master I2C interface, the Pulling Down system can be de-
activated by setting the SCLPD_OFF bit in register
RESET
. In this case, two successive reads of
the same DSP register are required and only the second one is valid (first read is ‘don’t care’). This
special protocol is no longer compatible with the I2C sub-address auto-incrementation function in
Read mode.
8.2
STV82x6 Reset
All STV82x6 features are controlled via the I2C bus. However, the device is designed to power up
into a fully working default mode without having to be sent I2C bus data to set it up.
The STV82x6 can be "reset" in 2 ways:
1. By Software via the I2C bus: This clears all synchronous logic, except for the I2C bus registers.
2. By Hardware via the RESET pin: In addition to clearing all synchronous logic, the RESET input
(active low) resets all the I2C bus registers to the
default values
listed below.
Table 8: I2C Read/Write Addresses
ADR
Write address (hex) (W)
Read address (hex) (R)
LOW (connected to GND1)
80h
81h
HIGH (connected to VDD1)
A0h
A1h
Start
W
A
Sub-address
A
Data
A
....
A
Data
A
Stop
Start
W
A
Sub-address
A
Stop
Start
R
A
Data
A
....
A
Data
N
相關(guān)PDF資料
PDF描述
STV9211 12 ns TRIPLE-CHANNEL HIGH VOLTAGE VIDEO AMPLIFIER
STV9553 12 ns TRIPLE-CHANNEL HIGH VOLTAGE VIDEO AMPLIFIER
STV9936 12 ns TRIPLE-CHANNEL HIGH VOLTAGE VIDEO AMPLIFIER
STV9936P 12 ns TRIPLE-CHANNEL HIGH VOLTAGE VIDEO AMPLIFIER
STV9936S 12 ns TRIPLE-CHANNEL HIGH VOLTAGE VIDEO AMPLIFIER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
STV8237 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Digital Audio Decoder/Processor for A2 and NICAM Television/Video Recorders
STV8237T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Digital Audio Decoder/Processor for A2 and NICAM Television/Video Recorders
STV8247 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Digital Audio Decoder/Processor for A2 and NICAM Television/Video Recorders
STV8247_06 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Digital Audio Decoder/Processor for A2 and NICAM Television/Video Recorders
STV8247D 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Digital Audio Decoder/Processor for A2 and NICAM Television/Video Recorders
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*