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參數(shù)資料
| 型號： | STV7610A |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | PLASMA DISPLAY PANEL DATA DRIVER |
| 中文描述： | 等離子顯示器數(shù)據(jù)驅(qū)動 |
| 文件頁數(shù)： | 13/17頁 |
| 文件大?。?/td> | 142K |
| 代理商： | STV7610A |
STV7610A
13/17
AC TIMINGS REQUIREMENTS
(V
CC
= 4.5 Vto 5.5 V, T
amb
= -20 to +85
°
C, input signals max leading edge &trailing edge (t
R
, t
F
) = 10 ns)
Symbol
Parameter
AC TIMINGS CHARACTERISTICS
(V
CC
= 5 V, V
PP
= 90 V
,
V
SPP
= 0 V, V
SSLOG
= 0 V, V
SSSUB
= 0 V, T
amb
= 25
°
C)
(V
IL(Max.)
= 0.2 Vcc, V
IH(Min.)
= 0.8 V
CC
, V
OH
= 4.0V, V
OL
= 0.4 V, unless otherwise specified)
Symbol
Parameter
Note 6
One output among 96, loading capacitor C
L
= 50pF, other outputs at low level.
Min.
Typ.
Max.
Unit
t
WHCLK
Duration of clock (CLK) pulse at high level
15
-
-
ns
t
WLCLK
Duration of clock (CLK) pulse at low level
15
-
-
ns
t
SDAT
Set-up Time of data input before clock (low to high) transition
10
-
-
ns
t
HDAT
Hold Time of data input after clock (low to high) transition
10
-
-
ns
t
SFR
Forward/
high) transition
(FOR/
) Set-up Time before clock (low to
100
t
DSTB
Minimum Delay to latch
after clock (low to high) transition
10
-
-
ns
t
SSTB
Minimum Delay to latch
before clock (low to high) transition
10
-
-
ns
t
STB
Latch
Low Level Pulse Duration
20
-
-
ns
t
BLK
Blanking
Pulse Duration
500
-
-
ns
t
POL
Polarity
Pulse Duration
500
-
-
ns
Min.
Typ. Max. Unit
t
CLK
Data clock Period
50
-
-
ns
t
RDAT
Logical Data Output Rise Time (CL=10pF)
-
12
20
ns
t
FDAT
Logical Data Output Fall Time (CL=10pF)
-
11
20
ns
t
PHL1
t
PLH1
Delay of logic data output (high to low transition) after clock (CLK) transition
Delay of logic data output (low to high transition) after clock (CLK) transition
-
-
30
30
50
50
ns
ns
t
PHL2
t
PLH2
Delay of power output change (high to low transition) after clock (CLK) transition
Delay of power output change (low to high transition) after clock (CLK) transition
-
-
135
80
180
180
ns
ns
t
PHL3
t
PLH3
Delay of power output change (high to low transition) after Latch (STB) transition
Delay of power output change (low to high transition) after Latch (STB) transition
-
-
115
70
165
165
ns
ns
t
PHL4
t
PLH4
Delay of power output change (high to low transition) to Blank or Polarity
(
,
) transition
Delay of power output change (low to high transition) to Blank or Polarity
(
,
) transition
BLK POL
-
-
100
55
160
160
ns
ns
t
ROUT
Power Output Rise Time ( Note 6)
-
50
150
ns
t
FOUT
Power Output Fall Time ( Note 6)
-
80
200
ns
reverse
REV
STB
(
)
STB
(
)
STB
(
)
BLK
(
)
POL
(
)
BLK POL
3
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| STV7612 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:PLASMA DISPLAY PANEL DATA DRIVER |
| STV7612/WAF | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:PLASMA DISPLAY PANEL DATA DRIVER |
| STV7617 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:PLASMA DISPLAY PANEL SCAN DRIVER |
| STV7617D | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:PLASMA DISPLAY PANEL SCAN DRIVER |
| STV7617U | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:PLASMA DISPLAY PANEL SCAN DRIVER |
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