參數(shù)資料
型號(hào)： STPCD0113BTC3
元件分類： 32位微控制器
英文描述： 32-Bit Microprocessor
中文描述： 32位微處理器
文件頁(yè)數(shù)： 26/61頁(yè)
文件大?。?/td> 1007K
代理商： STPCD0113BTC3
UPDATE HISTORY FOR PIN DESCRIPTION CHAPTER
26/61
Issue 2.2 - October 13, 2000
Removed statement; “The direction can be controlled by a strap option or an internal register bit.”
The following changes have been made to the Pin Description Chapter from Revision 1.0 to Release 1.2.
Section
Change
Text
“Note;
By setting signals ST[3:0] to the following value allows the STPC to be put
Tristate. This means the STPC is switched off and no signals are being driven.“
2.2.13.
Added
Section
2.1.
Change
Replaced
Text
“internal” With “assimilated “
“The DRAM controller to execute the host transactions is also driven by this
clock”
With
“This clock drives the DRAM controller to execute the host transactions”
“AD[31:0]
PCI Address/Data. This is the 32-bit multiplexed address and data
bus of the PCI. This bus is driven by the master during the address phase and
data phase of write transactions. It is driven by the target during data phase of
read transactions.”
With
“AD[31:0]
PCI Address/Data. This is the 32-bit PCI multiplexed address and
data bus. This bus is driven by the master during the address phase and data
phase of write transactions. It is driven by the target during data phase of read
transactions.”
“IDE devices are connected to SA[19:8] directly and ISA bus is connected to
these pins through two LS245 transceivers. The OE of the transceivers are
connected to ISAOE
#
and the DIR is connected to MASTER
#
. The A bus sig-
nals of the transceivers are connected to CPC and IDE DD bus and the B bus
signals are connected to ISA SA bus.”
With
“IDE devices are connected to SA[19:8] directly and the ISA bus is connected
to these pins through two LS245 transceivers. The transceiver OEs are con-
nected to ISAOE
#
and the DIR is connected to MASTER
#
. The transceiver bus
signals are connected to the CPC and IDE DD busses and B bus signals are
connected to ISA SA bus.”
“For IDE devices, these signals are used as the DA[2:0] and are connected to
DA[2:0] of IDE devices directly or through a buffer. If the toggling of signals is to
be masked during ISA bus cycles, they can be externally ORed before being
connected to the IDE devices.”
With
“For IDE devices, these signals are used as the DA[2:0] and are connected di-
rectly or through a buffer to DA[2:0] of the IDE devices. If the toggling of signals
are to be masked during ISA bus cycles, they can be externally ORed before
being connected to the IDE devices.”
2.2.1.
Replaced
2.2.1.
Replaced
2.2.6.
Replaced
2.2.6.
Replaced
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STPCD0175BTC3 功能描述:微處理器 - MPU 75MHz x86 Embedded RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
STPCD0175BTI3 功能描述:微處理器 - MPU 75MHz x86 Embedded RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
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