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參數(shù)資料
| 型號： | STM1001S |
| 廠商： | 意法半導體 |
| 英文描述： | Reset Circuit |
| 中文描述： | 復位電路 |
| 文件頁數(shù)： | 4/13頁 |
| 文件大?。?/td> | 185K |
| 代理商： | STM1001S |
STM1001
4/13
OPERATION
Reset Output
The STM1001 MICROPROCESSOR RESET
CIRCUIT asserts a reset signal to the MCU when-
ever V
CC
goes below the reset threshold (V
RST
).
RST is guaranteed valid down to V
CC
= 1V (0° to
70°C).
During power-up, once V
CC
exceeds the reset
threshold an internal timer keeps RST low for the
reset time-out period, t
rec
. After this interval, RST
returns high.
If V
CC
drops below the reset threshold, RST goes
low. Each time RST is asserted, it stays low for at
least the reset time-out period. Any time V
CC
goes
below the reset threshold, the internal timer clears.
The reset timer starts when V
CC
returns above the
reset threshold. The active-low reset (RST) is an
open drain output.
Negative-Going V
CC
Transients
The STM1001 is relatively immune to negative-go-
ing V
CC
transients (glitches).
Figure 11., page 7
shows typical transient duration versus reset com-
parator overdrive (for which the STM1001 will
NOT generate a reset pulse). The graph was gen-
erated using a negative pulse applied to V
CC
,
starting at 0.5V above the actual reset threshold
and ending below it by the magnitude indicated
(comparator overdrive). The graph indicates the
maximum pulse width a negative V
CC
transient
can have without causing a reset pulse. As the
magnitude of the transient increases (further be-
low the threshold), the maximum allowable pulse
width decreases. Any combination of duration and
overdrive which lies under the curve will NOT gen-
erate a reset signal. Typically, a V
CC
transient that
goes 100mV below the reset threshold and lasts
20μs or less will not cause a reset pulse. A 0.1μF
bypass capacitor mounted as close as possible to
the V
CC
pin provides additional transient immunity.
Valid /RST Output Down to V
CC
= 0V
When V
CC
falls below 1V, the RST output no long-
er sinks current, but becomes an open circuit. In
most systems this is not a problem, as most MCUs
do not operate below 1V. However, in applications
where RST output must be valid down to 0V, a
pull-down resistor may be added to hold the RST
output low. This resistor must be large enough to
not load the RST output, and still be small enough
to pull the output to ground. A 100K
resistor is
recommended.
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| STM1810TWX7F | 240 x 128 pixel format, LED or EL Backlight |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| STM1001SBWX6F | 制造商:STMicroelectronics 功能描述: 制造商:STMicroelectronics 功能描述:Processor Supervisor 2.93V 3V/3.3V/5V 3-Pin SOT-23 T/R |
| STM1001SWX6F | 功能描述:監(jiān)控電路 RESET CIRCUIT RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| STM1001T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Reset Circuit |
| STM1001TWX6F | 功能描述:監(jiān)控電路 RESET CIRCUIT RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| STM1001TWX6F-CUT TAPE | 制造商:ST 功能描述:STM1001 Series 3.08 V 140 ms Low-Power Supervisory Reset circuit - SOT-23 |
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