參數(shù)資料
型號: STK15C88-3P55I
元件分類: SRAM
英文描述: 32K X 8 NON-VOLATILE SRAM, 55 ns, PDIP28
封裝: 0.300 INCH, PLASTIC, DIP-28
文件頁數(shù): 9/10頁
文件大?。?/td> 291K
代理商: STK15C88-3P55I
STK15C88-3
September 2002
8
Internally, RECALL is a two-step procedure. First,
the SRAM data is cleared, and second, the nonvola-
tile information is transferred into the SRAM cells.
After the t
RECALL cycle time the SRAM will once again
be ready for READ and WRITE operations. The
RECALL
operation in no way alters the data in the
EEPROM
cells. The nonvolatile data can be recalled
an unlimited number of times.
AutoStoreTM OPERATION
The STK15C88-3 uses the intrinsic system capaci-
tance to perform an automatic STORE on power
down. As long as the system power supply takes at
least t
STORE to decay from VSWITCH down to 2.6V, the
STK15C88-3 will safely and automatically store the
SRAM
data in EEPROM on power down.
In order to prevent unneeded STORE operations,
automatic STOREs will be ignored unless at least
one WRITE operation has taken place since the
most recent STORE or RECALL cycle. Software-
initiated STORE cycles are performed regardless of
whether a WRITE operation has taken place.
POWER-UP RECALL
During power up, or after any low-power condition
(V
CC < VRESET), an internal RECALL request will be
latched. When V
CC once again exceeds the sense
voltage of V
SWITCH, a RECALL cycle will automatically
be initiated and will take t
RESTORE to complete.
If the STK15C88-3 is in a WRITE state at the end of
power-up RECALL, the SRAM data will be corrupted.
To help avoid this situation, a 10K Ohm resistor
should be connected either between W and system
V
CC or between E and system VCC.
HARDWARE PROTECT
The STK15C88-3 offers hardware protection
against inadvertent STORE operation and SRAM
WRITE
s during low-voltage conditions. When V
CC <
V
SWITCH, all software STORE operations and SRAM
WRITE
s are inhibited.
LOW AVERAGE ACTIVE POWER
The STK15C88-3 draws significantly less current
when it is cycled at times longer than 50ns. Figure 2
shows the relationship between I
CC and READ cycle
time. Worst-case current consumption is shown for
both CMOS and TTL input levels (commercial tem-
perature range, V
CC = 3.6V, 100% duty cycle on chip
enable). Figure 3 shows the same relationship for
WRITE
cycles. If the chip enable duty cycle is less
than 100%, only standby current is drawn when the
chip is disabled. The overall average current drawn
by the STK15C88-3 depends on the following
items: 1) CMOS vs. TTL input levels; 2) the duty
cycle of chip enable; 3) the overall cycle rate for
accesses; 4) the ratio of READs to WRITEs; 5) the
operating temperature; 6) the V
CC level; and 7) I/O
loading.
Figure 2: ICC (max) Reads
0
10
20
30
40
50
100
150
200
Cycle Time (ns)
TTL
CMOS
A
ve
rage
Acti
ve
C
u
rre
nt
(m
A)
Figure 3: ICC (max) Writes
0
10
20
30
40
50
100
150
200
Cycle Time (ns)
TTL
CMOS
A
ve
rage
Acti
ve
C
u
rre
nt
(m
A)
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
STK15C88-N35I 制造商:Cypress Semiconductor 功能描述: 制造商:Rochester Electronics LLC 功能描述:
STK15C88-NF25 功能描述:NVRAM 32Kbx8 4.5-5.5V AutoStore RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube
STK15C88-NF25I 功能描述:NVRAM 32Kbx8 4.5-5.5V AutoStore RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube
STK15C88-NF25ITR 功能描述:NVRAM 32Kbx8 4.5-5.5V AutoStore RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube
STK15C88-NF25TR 功能描述:NVRAM 32Kbx8 4.5-5.5V AutoStore RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube