
STAC9227/9228/9229/9230
8-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
IDT
8-CHANNEL HIGH DEFINITION AUDIO CODEC
25
STAC9227/9228/9229/9230V 1.0 MARCH 2007
IDT CONFIDENTIAL
Figure 1. Single Digital Microphone (data is ported to both left and right channels)
Table 3. DMIC_CLK, DMIC_0 and DMIC_1 Operation During Power States
Power
State
DMIC Widget
Enabled
DMIC_CLK
Output
DMIC_0,1
Notes
D0
Yes
Clock Capable Input Capable
DMIC_CLK Output is Enabled when either DMIC_0
or DMIC_1 Input Widget is Enabled. Otherwise, the
DMIC_CLK remains Low
DMIC_CLK Output is Enabled when either DMIC_0
or DMIC_1 Input Widget is Enabled. Otherwise, the
DMIC_CLK remains Low
D1
Yes
Clock Capable Input Capable
D2
D3
Yes
Yes
No
Clock Disabled Input Disabled DMIC_CLK Remains Low
Clock Disabled Input Disabled DMIC_CLK Remains Low
Clock Disabled Input Disabled DMIC_CLK is HIGH-Z with Weak Pull-down
D0-D3
Digital
Microphone
DMIC_0
OR
DMIC_1
D
DMIC_CLK
STEREO
ADC0, 1 or 2
PCM
M
Single Line In
Stereo Channels
Output
Pin
DMIC_0
Or
DMIC_1
DMIC_CLK
Right
Channel
Left
Channel
Valid Data
Valid Data+1
On-Chip
Multiplexer
Pin
On-Chip
Off-Chip
Q
CK