參數(shù)資料
型號(hào)： ST95P04M3TR
廠商： 意法半導(dǎo)體
英文描述： SERIAL ACCESS SPI BUS 4K 512 x 8 EEPROM
中文描述： 串行訪問SPI總線4K的512 × 8的EEPROM
文件頁(yè)數(shù)： 1/16頁(yè)
文件大?。?/td> 151K
代理商： ST95P04M3TR
AI01063B
S
VCC
ST95P04
HOLD
VSS
W
Q
C
D
Figure 1. Logic Diagram
ST95P04
SERIAL ACCESS SPI BUS 4K (512 x 8) EEPROM
NOT FOR NEW DESIGN
1 MILLION ERASE/WRITE CYCLES
40 YEARS DATA RETENTION
SINGLE 3V to 5.5V SUPPLY VOLTAGE
SPI BUS COMPATIBLE SERIAL INTERFACE
1 MHz CLOCK RATE MAX
BLOCK WRITE PROTECTION
STATUS REGISTER
16 BYTE PAGE MODE
WRITE PROTECT
SELF-TIMED PROGRAMMING CYCLE
E.S.D.PROTECTION GREATER than 4000V
The ST95P04 will be replaced shortly by the
updated version ST95040
DESCRIPTION
The ST95P04 is a 4K bit Electrically Erasable
Programmable Memory (EEPROM) fabricated with
SGS-THOMSON’s High Endurance Single Polysili-
con CMOS technology. The 4K bit memory is or-
ganised as 32 pages of 16 bytes. The memory is
accessed by a simple SPI bus compatible serial
interface. The bus signals are a serial clock input
(C), a serial data input (D) and a serial data output
(Q). The device connected to the bus is selected
when the chip select input (S) goes low. Commu-
nications with the chip can be interrupted with a
hold input (HOLD). The write operation is disabled
by a write protect input (W).
C
Serial Clock
D
Serial Data Input
Q
Serial Data Output
S
Chip Select
W
Write Protect
HOLD
Hold
VCC
Supply Voltage
VSS
Ground
Table 1. Signal Names
8
1
SO8 (M)
8
1
PSDIP8 (B)
0.25mm Frame
June 1996
1/16
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