參數(shù)資料
型號(hào)： ST92195B5B1
廠商： 意法半導(dǎo)體
英文描述： 32-64K ROM HCMOS MCU WITH ON-SCREEN-DISPLAY AND TELETEXT DATA SLICER
中文描述： 32 - 64K的對(duì)光盤HCMOS與微控制器屏幕顯示和圖文電視數(shù)據(jù)限幅器
文件頁(yè)數(shù)： 2/22頁(yè)
文件大?。?/td> 140K
代理商： ST92195B5B1
2/22
ST92195B - GENERAL DESCRIPTION
1 GENERAL DESCRIPTION
1.1 INTRODUCTION
The ST92195B microcontroller is developed and
manufactured by STMicroelectronics using a pro-
prietary n-well HCMOS process. Its performance
derives from the use of a flexible 256-register pro-
gramming model for ultra-fast context switching
and real-time event response. The intelligent on-
chip peripherals offload the ST9 core from I/O and
data management processing tasks allowing criti-
cal application tasks to get the maximum use of
core resources.The ST92195B MCU supports low
power consumption and low voltage operation for
power-efficient and low-cost embedded systems.
1.1.1 ST9+ Core
The advanced Core consists of the Central
Processing Unit (CPU), the Register File and the
Interrupt controller.
The general-purpose registers can be used as ac-
cumulators, index registers, or address pointers.
Adjacent registerpairs make up 16-bit registers for
addressing or 16-bit processing. Although theST9
has an 8-bit ALU, the chip handles 16-bit opera-
tions, including arithmetic, loads/stores, and mem-
ory/register and memory/memory exchanges.
Two basic addressable spaces are available: the
Memory space and the Register File, which in-
cludes the control and status registers of the on-
chip peripherals.
1.1.2 Power Saving Modes
To optimize performance versus power consump-
tion, a range of operating modes can be dynami-
cally selected.
Run Mode.
This is the full speed execution mode
with CPUand peripherals running at themaximum
clock speed delivered by the Phase Locked Loop
(PLL) of the Clock Control Unit (CCU).
Wait For Interrupt Mode.
The Wait For Interrupt
(WFI) instructionsuspends program execution un-
til an interrupt request is acknowledged. During
WFI, the CPU clock is halted while the peripheral
and interrupt controller keep running at a frequen-
cy programmable via the CCU. In this mode, the
power consumption of the device can be reduced
by more than 95% (Low power WFI).
Halt Mode.
When executing the HALT instruction,
and if the Watchdog is not enabled, the CPU and
its peripherals stop operating and the status of the
machine
remains frozen
stopped). A reset is necessary to exit from Halt
mode.
1.1.3 I/O Ports
Up to 28 I/O lines are dedicated to digital Input/
Output. These lines are grouped into up to five I/O
Ports and can be configured on a bit basis under
software control to provide timing, status signals,
timer and output,analog inputs,external interrupts
and serial or parallel I/O.
1.1.4 TV Peripherals
A set of on-chip peripherals form a complete sys-
tem for TV set and VCR applications:
– Voltage Synthesis
– VPS/WSS Slicer
– Teletext Slicer
– Teletext Display RAM
– OSD
1.1.5 On Screen Display
The human interface is provided by the On Screen
Display module, this can produce up to 26 lines of
up to 80 characters from a ROM defined 512 char-
acter set. The character resolution is 10x10 dot.
Four character sizes are supported. Serial at-
tributes allow the user to select foreground and
background colors, charactersize and fringe back-
ground. Parallel attributes can be used to select
additional foreground and background colors and
underline on a character by character basis.
1.1.6 Teletext and Display Storage RAM
The internal Teletext and Display storage RAM
can be usedto store Teletext pages as well as Dis-
play parameters.
(the clock is
also
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