參數(shù)資料
型號: ST7PLITE02F0U6TR
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 16 MHz, MICROCONTROLLER, QCC20
封裝: QFN-20
文件頁數(shù): 110/125頁
文件大小: 1956K
代理商: ST7PLITE02F0U6TR
ST7LITE0x, ST7LITESx
85/125
13.3.2 Operating Conditions with Low Voltage Detector (LVD)
TA = -40 to 85°C, unless otherwise specified
Notes:
1. Not tested in production.
2. Not tested in production. The VDD rise time rate condition is needed to ensure a correct device power-on and LVD reset.
When the VDD slope is outside these values, the LVD may not ensure a proper reset of the MCU.
13.3.3 Auxiliary Voltage Detector (AVD) Thresholds
TA = -40 to 85°C, unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIT+(LVD)
Reset release threshold
(VDD rise)
High Threshold
Med. Threshold
Low Threshold
4.00 1)
3.40 1)
2.65 1)
4.25
3.60
2.90
4.50
3.80
3.15
V
VIT-(LVD)
Reset generation threshold
(VDD fall)
High Threshold
Med. Threshold
Low Threshold
3.80
3.20
2.40
4.05
3.40
2.70
4.30 1)
3.65 1)
2.90 1)
Vhys
LVD voltage threshold hysteresis
VIT+(LVD)-VIT-(LVD)
200
mV
VtPOR
VDD rise time rate
2)
20
20000
s/V
tg(VDD)
Filtered glitch delay on VDD
Not detected by the LVD
150
ns
IDD(LVD)
LVD/AVD current consumption
220
A
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIT+(AVD)
1=>0 AVDF flag toggle threshold
(VDD rise)
High Threshold
Med. Threshold
Low Threshold
4.40
3.90
3.20
4.70
4.10
3.40
5.00
4.30
3.60
V
VIT-(AVD)
0=>1 AVDF flag toggle threshold
(VDD fall)
High Threshold
Med. Threshold
Low Threshold
4.30
3.70
2.90
4.60
3.90
3.20
4.90
4.10
3.40
Vhys
AVD voltage threshold hysteresis
VIT+(AVD)-VIT-(AVD)
150
mV
V
IT-
Voltage drop between AVD flag set
and LVD reset activation
VDD fall
0.45
V
1
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