參數(shù)資料
型號: ST72T213G1B3
廠商: 意法半導(dǎo)體
英文描述: 8-BIT MCU WITH 4 TO 8K ROM/OTP/EPROM, 256 BYTES RAM, ADC, WDG, SPI AND 1 OR 2 TIMERS
中文描述: 8位微控制器有4到8K的光碟/雙層/存儲器,256字節(jié)RAM,ADC的,水分散粒劑,SPI和1或2定時器
文件頁數(shù): 5/84頁
文件大?。?/td> 531K
代理商: ST72T213G1B3
13/84
ST72101/ST72212/ST72213
2 CENTRAL PROCESSING UNIT
2.1 INTRODUCTION
This CPU has a full 8-bit architecture and contains
six internal registers allowing efficient 8-bit data
manipulation.
2.2 MAIN FEATURES
s
63 basic instructions
s
Fast 8-bit by 8-bit multiply
s
17 main addressing modes (with indirect
addressing mode)
s
Two 8-bit index registers
s
16-bit stack pointer
s
8 MHz CPU internal frequency
s
Low power modes
s
Maskable hardware interrupts
s
Non-maskable software interrupt
2.3 CPU REGISTERS
The 6 CPU registers shown in Figure 10 are not
present in the memory mapping and are accessed
by specific instructions.
Accumulator (A)
The Accumulator is an 8-bit general purpose reg-
ister used to hold operands and the results of the
arithmetic and logic calculations and to manipulate
data.
Index Registers (X and Y)
In indexed addressing modes, these 8-bit registers
are used to create either effective addresses or
temporary storage areas for data manipulation.
(The Cross-Assembler generates a precede in-
struction (PRE) to indicate that the following in-
struction refers to the Y register.)
The Y register is not affected by the interrupt auto-
matic procedures (not pushed to and popped from
the stack).
Program Counter (PC)
The program counter is a 16-bit register containing
the address of the next instruction to be executed
by the CPU. It is made of two 8-bit registers PCL
(Program Counter Low which is the LSB) and PCH
(Program Counter High which is the MSB).
Figure 10. CPU Registers
ACCUMULATOR
X INDEX REGISTE R
Y INDEX REGISTE R
STACK POINTER
CONDITIO N CODE REGIST ER
PROGRAM COUNTER
70
1C
11H I
N Z
RESET VALUE = RESET VECTOR @ FFFEh-FFFFh
70
0
7
15
8
PCH
PCL
15
87
0
RESET VALUE = STACK HIGHER ADDRESS
RESET VALUE = 1X
11X 1X X
RESET VALUE = XXh
X = Undefined Value
13
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