參數(shù)資料
型號: ST72P621L4M1
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO34
封裝: PLASTIC, SO-34
文件頁數(shù): 100/136頁
文件大?。?/td> 2475K
代理商: ST72P621L4M1
ST7262
66/136
10.5 SERIAL COMMUNICATIONS INTERFACE (SCI)
10.5.1 Introduction
The Serial Communications Interface (SCI) offers
a flexible means of full-duplex data exchange with
external equipment requiring an industry standard
NRZ asynchronous serial data format. The SCI of-
fers a very wide range of baud rates using two
baud rate generator systems.
10.5.2 Main Features
Full duplex, asynchronous communications
NRZ standard format (Mark/Space)
Dual baud rate generator systems
Independently
programmable
transmit
and
receive baud rates up to 500K baud.
Programmable data word length (8 or 9 bits)
Receive buffer full, Transmit buffer empty and
End of Transmission flags
Two receiver wake-up modes:
– Address bit (MSB)
– Idle line
Muting function for multiprocessor configurations
Separate
enable bits for Transmitter and
Receiver
Four error detection flags:
– Overrun error
– Noise error
– Frame error
– Parity error
Five interrupt sources with flags:
– Transmit data register empty
– Transmission complete
– Receive data register full
– Idle line received
– Overrun error detected
Parity control:
– Transmits parity bit
– Checks parity of received data byte
Reduced power consumption mode
10.5.3 General Description
The interface is externally connected to another
device by two pins (see Figure 47):
– TDO: Transmit Data Output. When the transmit-
ter and the receiver are disabled, the output pin
returns to its I/O port configuration. When the
transmitter and/or the receiver are enabled and
nothing is to be transmitted, the TDO pin is at
high level.
– RDI: Receive Data Input is the serial data input.
Oversampling techniques are used for data re-
covery by discriminating between valid incoming
data and noise.
Through these pins, serial data is transmitted and
received as frames comprising:
– An Idle Line prior to transmission or reception
– A start bit
– A data word (8 or 9 bits) least significant bit first
– A Stop bit indicating that the frame is complete.
This interface uses two types of baud rate generator:
– A conventional type for commonly-used baud
rates,
– An extended type with a prescaler offering a very
wide range of baud rates even with non-standard
oscillator frequencies.
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