參數(shù)資料
型號(hào)： ST72C254G2M6
英文描述： 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY. ADC. 16-BIT TIMERS. SPI.
中文描述： 8位單電壓閃存微控制器。 ADC的。 16位定時(shí)器。的SPI。
文件頁數(shù)： 112/140頁
文件大?。?/td> 1349K
代理商： ST72C254G2M6
ST72104G, ST72215G, ST72216G, ST72254G
73/140
12.4 I2C BUS INTERFACE (I2C)
12.4.1 Introduction
The I2C Bus Interface serves as an interface be-
tween the microcontroller and the serial I2C bus. It
provides both multimaster and slave functions,
and controls all I2C bus-specific sequencing, pro-
tocol, arbitration and timing. It supports fast I2C
mode (400kHz).
12.4.2 Main Features
s
Parallel-bus/I2C protocol converter
s
Multi-master capability
s
7-bit/10-bit Addressing
s
Transmitter/Receiver flag
s
End-of-byte transmission flag
s
Transfer problem detection
I2C Master Features:
s
Clock generation
s
I2C bus busy flag
s
Arbitration Lost Flag
s
End of byte transmission flag
s
Transmitter/Receiver Flag
s
Start bit detection flag
s
Start and Stop generation
I2C Slave Features:
s
Stop bit detection
s
I2C bus busy flag
s
Detection of misplaced start or stop condition
s
Programmable I2C Address detection
s
Transfer problem detection
s
End-of-byte transmission flag
s
Transmitter/Receiver flag
12.4.3 General Description
In addition to receiving and transmitting data, this
interface converts it from serial to parallel format
and vice versa, using either an interrupt or polled
handshake. The interrupts are enabled or disabled
by software. The interface is connected to the I2C
bus by a data pin (SDAI) and by a clock pin (SCLI).
It can be connected both with a standard I2C bus
and a Fast I2C bus. This selection is made by soft-
ware.
Mode Selection
The interface can operate in the four following
modes:
– Slave transmitter/receiver
– Master transmitter/receiver
By default, it operates in slave mode.
The interface automatically switches from slave to
master after it generates a START condition and
from master to slave in case of arbitration loss or a
STOP generation, allowing then Multi-Master ca-
pability.
Communication Flow
In Master mode, it initiates a data transfer and
generates the clock signal. A serial data transfer
always begins with a start condition and ends with
a stop condition. Both start and stop conditions are
generated in master mode by software.
In Slave mode, the interface is capable of recog-
nising its own address (7 or 10-bit), and the Gen-
eral Call address. The General Call address de-
tection may be enabled or disabled by software.
Data and addresses are transferred as 8-bit bytes,
MSB first. The first byte(s) following the start con-
dition contain the address (one in 7-bit mode, two
in 10-bit mode). The address is always transmitted
in Master mode.
A 9th clock pulse follows the 8 clock cycles of a
byte transfer, during which the receiver must send
an acknowledge bit to the transmitter. Refer to Fig-
ure 43.
Figure 43. I2C BUS Protocol
SCL
SDA
12
8
9
MSB
ACK
STOP
START
CONDITION
VR02119B
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ST72C254G2M6 制造商:STMicroelectronics 功能描述:8BIT MCU FLASH 8K 72C254 SOIC28
ST72C254G2M6/TR 制造商:ST 功能描述:0
ST72C254G2M6E 制造商:STMicroelectronics 功能描述:8K S028 LEADFREE - Rail/Tube
ST72C314J2B1 制造商:STMicroelectronics 功能描述:ST72FLASH 8K - Bulk
ST72C314J2T6 功能描述:8位微控制器 -MCU Flash 16K SPI/SCI RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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