參數(shù)資料
型號： ST72C124J4T6
英文描述： IC-ST7 MICROCONTROLLER
中文描述： 集成電路ST7微控制器
文件頁數(shù)： 122/153頁
文件大小： 1988K
代理商： ST72C124J4T6
ST72334J/N, ST72314J/N, ST72124J
70/153
16-BIT TIMER (Cont’d)
OUTPUT
COMPARE
2
HIGH
REGISTER
(OC2HR)
Read/Write
Reset Value: 1000 0000 (80h)
This is an 8-bit register that contains the high part
of the value to be compared to the CHR register.
OUTPUT
COMPARE
2
LOW
REGISTER
(OC2LR)
Read/Write
Reset Value: 0000 0000 (00h)
This is an 8-bit register that contains the low part of
the value to be compared to the CLR register.
COUNTER HIGH REGISTER (CHR)
Read Only
Reset Value: 1111 1111 (FFh)
This is an 8-bit register that contains the high part
of the counter value.
COUNTER LOW REGISTER (CLR)
Read Only
Reset Value: 1111 1100 (FCh)
This is an 8-bit register that contains the low part of
the counter value. A write to this register resets the
counter. An access to this register after accessing
the SR register clears the TOF bit.
ALTERNATE
COUNTER
HIGH
REGISTER
(ACHR)
Read Only
Reset Value: 1111 1111 (FFh)
This is an 8-bit register that contains the high part
of the counter value.
ALTERNATE
COUNTER
LOW
REGISTER
(ACLR)
Read Only
Reset Value: 1111 1100 (FCh)
This is an 8-bit register that contains the low part of
the counter value. A write to this register resets the
counter. An access to this register after an access
to SR register does not clear the TOF bit in SR
register.
INPUT CAPTURE 2 HIGH REGISTER (IC2HR)
Read Only
Reset Value: Undefined
This is an 8-bit read only register that contains the
high part of the counter value (transferred by the
Input Capture 2 event).
INPUT CAPTURE 2 LOW REGISTER (IC2LR)
Read Only
Reset Value: Undefined
This is an 8-bit read only register that contains the
low part of the counter value (transferred by the In-
put Capture 2 event).
70
MSB
LSB
70
MSB
LSB
70
MSB
LSB
70
MSB
LSB
70
MSB
LSB
70
MSB
LSB
70
MSB
LSB
70
MSB
LSB
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參數(shù)描述
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ST72C215G2M5 制造商:STMicroelectronics 功能描述:MCU 8BIT ST7 CISC 8KB FLASH 3.3V/5V 28SOIC - Rail/Tube
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