參數(shù)資料
型號： ST72C124J4B6
英文描述： IC-ST7 MICROCONTROLLER
中文描述： 集成電路ST7微控制器
文件頁數(shù)： 63/153頁
文件大小： 1988K
代理商： ST72C124J4B6
ST72334J/N, ST72314J/N, ST72124J
17/153
5 FLASH PROGRAM MEMORY
5.1 INTRODUCTION
FLASH devices have a single voltage non-volatile
FLASH memory that may be programmed in-situ
(or plugged in a programming tool) on a byte-by-
byte basis.
5.2 MAIN FEATURES
s
Remote In-Situ Programming (ISP) mode
s
Up to 16 bytes programmed in the same cycle
s
MTP memory (Multiple Time Programmable)
s
Read-out memory protection against piracy
5.3 STRUCTURAL ORGANISATION
The FLASH program memory is organised in a
single 8-bit wide memory block which can be used
for storing both code and data constants.
The FLASH program memory is mapped in the up-
per part of the ST7 addressing space and includes
the reset and interrupt user vector area .
5.4 IN-SITU PROGRAMMING (ISP) MODE
The FLASH program memory can be programmed
using Remote ISP mode. This ISP mode allows
the contents of the ST7 program memory to be up-
dated using a standard ST7 programming tools af-
ter the device is mounted on the application board.
This feature can be implemented with a minimum
number of added components and board area im-
pact.
An example Remote ISP hardware interface to the
standard ST7 programming tool is described be-
low. For more details on ISP programming, refer to
the ST7 Programming Specification.
Remote ISP Overview
The Remote ISP mode is initiated by a specific se-
quence on the dedicated ISPSEL pin.
The Remote ISP is performed in three steps:
– Selection of the RAM execution mode
– Download of Remote ISP code in RAM
– Execution of Remote ISP code in RAM to pro-
gram the user program into the FLASH
Remote ISP hardware configuration
In Remote ISP mode, the ST7 has to be supplied
with power (VDD and VSS) and a clock signal (os-
cillator and application crystal circuit for example).
This mode needs five signals (plus the VDD signal
if necessary) to be connected to the programming
tool. This signals are:
– RESET: device reset
–VSS: device ground power supply
– ISPCLK: ISP output serial clock pin
– ISPDATA: ISP input serial data pin
– ISPSEL: Remote ISP mode selection. This pin
must be connected to VSS on the application
board through a pull-down resistor.
If any of these pins are used for other purposes on
the application, a serial resistor has to be imple-
mented to avoid a conflict if the other device forces
the signal level.
Figure 6 shows a typical hardware interface to a
standard ST7 programming tool. For more details
on the pin locations, refer to the device pinout de-
scription.
Figure 6. Typical Remote ISP Interface
5.5 MEMORY READ-OUT PROTECTION
The read-out protection is enabled through an op-
tion bit.
For FLASH devices, when this option is selected,
the program and data stored in the FLASH memo-
ry are protected against read-out piracy (including
a re-write protection). When this protection option
is removed the entire FLASH program memory is
first automatically erased. However, the E2PROM
data memory (when available) can be protected
only with ROM devices.
ISPSEL
VSS
RESET
ISPCLK
ISPDATA
OS
C
1
OS
C
2
V
DD
ST7
HE10 CONNECTOR TYPE
TO PROGRAMMING TOOL
10K
CL0
CL1
APPLICATION
47K
1
XTAL
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參數(shù)描述
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