參數(shù)資料
型號(hào): ST6260BM1
廠商: 意法半導(dǎo)體
英文描述: 8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, AUTO-RELOAD TIMER, EEPROM AND SPI
中文描述: 8位檢察官辦公室/存儲(chǔ)器與阿微控制器/ D轉(zhuǎn)換器,自動(dòng)重加載定時(shí)器,EEPROM和的SPI
文件頁(yè)數(shù): 19/75頁(yè)
文件大?。?/td> 540K
代理商: ST6260BM1
19/75
ST62T53B/T60B/T63B ST62E60B
CLOCK SYSTEM
(Cont’d)
Oscillator Control Registers
Address: DCh
Write only
Bit 7-4. These bits are not used.
Bit 3. Reserved. Cleared at Reset. THIS BIT
MUST BE SET TO 1 BY USER PROGRAM to
achieve lowest power consumption.
Bit 2. Reserved. Must be kept low.
RS1-RS0. These bits select the division ratio of
the Oscillator Divider in order to generate the inter-
nal frequency. The following selctions are availa-
ble:
Note
: Care is required when handling the OSCR
register as some bits are write only. For this rea-
son, it is not allowed to change the OSCR contents
while executing interrupt service routine, as the
service routine cannot save and then restore its
previous content. If it is impossible to avoid the
writing of this register in interrupt service routine,
an image of this register must be saved in a RAM
location, and each time the program writes to
OSCR it must write also to the image register. The
image register must be written first, so if an inter-
rupt occurs between the two instructions the
OSCR is not affected.
Figure 10. Clock Circuit Block Diagram
7
0
-
-
-
-
OSCR
3
OSCR
2
RS1
RS0
RS1
0
0
1
1
RS0
0
1
0
1
Division Ratio
1
2
4
4
MAIN
OSCILLATOR
Core
SPI
: 13
: 12
: 1
Timer
Watchdog
POR
f
INT
ADC
AR Timer
OSCILLATOR
DIVIDER
RS0, RS1
OSCin
OSCout
f
OSC
f
OSC
19
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