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參數(shù)資料
| 型號(hào)： | ST24LW21M1TR |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 1 Kbit x8 Dual Mode Serial EEPROM for VESA PLUG & PLAY |
| 中文描述： | 1千位x8雙模式串行EEPROM的韋莎插頭 |
| 文件頁(yè)數(shù)： | 17/22頁(yè) |
| 文件大?。?/td> | 159K |
| 代理商： | ST24LW21M1TR |
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AI01749
VSync
100nF
47k
+5V
SCL
SDA
+5V Monitor
VCLK
SCL
SDA
VSS
VCC
MONITOR
HOST
VGA Cable
14
15
12
9
Figure 13. Recommended Schematic for VESA 2.0 Specification
low during this time, the ST24xy21 terminate the
data transfer and switches to a standby state.
NOTE CONCERNING THE POWER SUPPLY
VOLTAGE IN THE VESA 2.0 SPECIFICATION
According to the VESA 2.0 specification, the
ST24xy21 can be supplied by either the MONITOR
or by the HOST (using +5V on the VGA cable pin
9) power supply. The easyest way to implement this
is to use 2 diodes as described in the following
schematic. The ST24xy21 supply voltage will be
decreased by 0.6V, which is the diode forward
voltage drop, and will be below 4.5V. Nevertheless,
the ST24xy21 remains operational and no input will
be damaged if the applied voltage on any input
complies with the Absolute Maximum Ratings val-
ues.
Under this condition, the threshold voltage of the
Schmitt-Trigger (pin 7) will be decreased (as in
Table 6).
17/22
ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21
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