
ST203S Series
D-473
V
TM
Max. peak on-state voltage
1.72
I
TM
= 600A, T
J
= T
J
max, t
p
= 10ms sine wave pulse
V
T(TO)1
Low level value of threshold
voltage
V
T(TO)2
High level value of threshold
voltage
r
t
1
slope resistance
r
t
2
slope resistance
Low level value of forward
High level value of forward
I
H
I
L
Maximum holding current
600
T
J
= 25°C, I
T
> 30A
T
J
= 25°C, V
A
= 12V, Ra = 6
,
I
G
= 1A
Typical latching current
1000
Parameter
ST203S
Units
Conditions
On-state Conduction
1.17
(16.7% x
π
x I
T(AV)
< I <
π
x I
T(AV)
), T
J
= T
J
max.
1.20
(I >
π
x I
T(AV)
), T
J
= T
J
max.
V
0.92
(16.7% x
π
x I
T(AV)
< I <
π
x I
T(AV)
), T
J
= T
J
max.
0.87
(I >
π
x I
T(AV)
), T
J
= T
J
max.
m
mA
di/dt
Max. non-repetitive rate of rise
of turned-on current
T
J
= T
J
max, V
DRM
= rated V
DRM
I
TM
= 2 x di/dt
T
J
= 25°C, V
DM
= rated V
DRM
,
I
TM
= 50A DC, t
p
= 1μs
Resistive load, Gate pulse: 10V, 5
source
T
J
= T
J
max,
I
TM
= 300A, commutating di/dt
= 20A/μs
V
R
= 50V, t
p
= 500μs, dv/dt: see table in device code
Switching
Parameter
ST203S
Units
Conditions
1000
A/μs
t
d
Typical delay time
0.79
Min
20
Max
30
dv/dt
Maximum critical rate of rise of
off-state voltage
T
= T
max., linear to 80% V
DRM
, higher value
available on request
I
RRM
I
DRM
Max. peak reverse and off-state
leakage current
Parameter
ST203S
Units
Conditions
Blocking
500
V/
μ
s
40
mA
T
J
= T
J
max, rated V
DRM
/V
RRM
applied
P
GM
P
G(AV)
I
GM
+V
GM
Maximum peak gate power
60
Maximum average gate power
10
Max. peak positive gate current
10
A
T
J
= T
J
max, t
p
≤
5ms
Maximum peak positive
gate voltage
-V
GM
Maximum peak negative
gate voltage
I
GT
Max. DC gate current required
to trigger
V
GT
Max. DC gate voltage required
to trigger
I
GD
V
GD
Max. DC gate current not to trigger
20
mA
Max. DC gate voltage not to trigger
0.25
V
Triggering
Parameter
ST203S
Units
Conditions
20
5
V
T
J
= T
J
max, t
p
≤
5ms
200
mA
3
V
T
J
= 25°C, V
A
= 12V, Ra = 6
T
J
= T
J
max, rated V
DRM
applied
μs
W
T
J
= T
J
max, f = 50Hz, d% = 50
t
q
Max. turn-off time
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