參數(shù)資料
型號: ST16C650ACJ44
廠商: EXAR CORP
元件分類: 微控制器/微處理器
英文描述: 2.90V TO 5.5V UART WITH 32-BYTE FIFO
中文描述: 1 CHANNEL(S), 3.125M bps, SERIAL COMM CONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 3/53頁
文件大?。?/td> 666K
代理商: ST16C650ACJ44
á
REV. 5.0.0
ST16C650A
2.90V TO 5.5V UART WITH 32-BYTE FIFO
3
PIN DESCRIPTIONS
ORDERING INFORMATION
P
ART
N
UMBER
P
ACKAGE
O
PERATING
T
EMPERATURE
R
ANGE
D
EVICE
S
TATUS
ST16C650ACP40
40-Lead PDIP
0°C to +70°C
Discontinued. See the ST16C650ACQ48 for a replacement.
ST16C650ACJ44
44-Lead PLCC
0°C to +70°C
Active
ST16C650ACQ48
48-Lead TQFP
0°C to +70°C
Active
ST16C650AIP40
40-Lead PDIP
-40°C to +85°C
Discontinued. See the ST16C650AIQ48 for a replacement.
ST16C650AIJ44
44-Lead PLCC
-40°C to +85°C
Active
ST16C650AIQ48
48-Lead TQFP
-40°C to +85°C
Active
N
AME
40-
PDIP
P
IN
#
44-
PLCC
P
IN
#
48-
TQFP
P
IN
#
T
YPE
D
ESCRIPTION
16 (Intel) MODE DATA BUS INTERFACE. The SEL pin is connected to VCC.
A2
A1
A0
26
27
28
29
30
31
26
27
28
I
Address bus lines [2:0]
A2:A0 selects internal UART’s configuration registers.
D7
D6
D5
D4
D3
D2
D1
D0
8
7
6
5
4
3
2
1
9
8
7
6
5
4
3
2
4
3
2
47
46
45
44
43
IO
Data bus lines [7:0] (bidirectional)
IOR#
21
24
19
I
Input/Output Read (active low)
The falling edge instigates an internal read cycle and retrieves the data
byte from an internal register pointed by the address lines [A2:A0], places
it on the data bus to allow the host processor to read it on the leading
edge. Its function is the same as IOR, except it is active low. Either an
active IOR# or IOR is required to transfer data from 650A to CPU during a
read operation. If this input is unused, it should be connected to VCC to
minimize supply current.
IOR
22
25
20
I
Input/Output Read (active high)
Same as IOR# but active high. If this input is unused, it should be con-
nected to GND to minimize supply current.
IOW#
18
20
16
I
Input/Output Write (active low) - Intel bus mode
The falling edge instigates the internal write cycle and the trailing edge
transfers the data byte on the data bus to an internal register pointed by
the address lines [A2:A0]. Its function is the same as IOW, except it is
active low. Either an active IOW# or IOW is required to transfer data from
650A to the Intel type CPU during a write operation. If this input is unused,
it should be connected to VCC to minimize supply current.
相關PDF資料
PDF描述
ST16C650ACP40 2.90V TO 5.5V UART WITH 32-BYTE FIFO
ST16C650ACQ48 2.90V TO 5.5V UART WITH 32-BYTE FIFO
ST16C650AIJ44 2.90V TO 5.5V UART WITH 32-BYTE FIFO
ST16C650AIP40 2.90V TO 5.5V UART WITH 32-BYTE FIFO
ST16C650AIQ48 2.90V TO 5.5V UART WITH 32-BYTE FIFO
相關代理商/技術參數(shù)
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