參數(shù)資料
型號: ST16C554DIJ68-F
廠商: Exar Corporation
文件頁數(shù): 35/39頁
文件大小: 0K
描述: IC UART FIFO 16B QUAD 68PLCC
標(biāo)準(zhǔn)包裝: 19
特點: *
通道數(shù): 4,QUART
FIFO's: 16 字節(jié)
規(guī)程: RS232
電源電壓: 2.97 V ~ 5.5 V
帶自動流量控制功能:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 68-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 68-PLCC
包裝: 管件
其它名稱: 1016-1267-5
ST16C554/554D
5
REV. 4.0.1
2.97V TO 5.5V QUAD UART WITH 16-BYTE FIFO
Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain.
DTRA#
DTRB#
DTRC#
DTRD#
3
15
34
46
12
24
46
58
O
UART channels A-D Data-Terminal-Ready (active low) or general purpose out-
put. If these outputs are not used, leave them unconnected.
DSRA#
DSRB#
DSRC#
DSRD#
1
17
32
48
10
26
44
60
I
UART channels A-D Data-Set-Ready (active low) or general purpose input. This
input should be connected to VCC when not used. This input has no effect on
the UART.
CDA#
CDB#
CDC#
CDD#
64
18
31
49
9
27
43
61
I
UART channels A-D Carrier-Detect (active low) or general purpose input. This
input should be connected to VCC when not used. This input has no effect on
the UART.
RIA#
RIB#
RIC#
RID#
63
19
30
50
8
28
42
62
I
UART channels A-D Ring-Indicator (active low) or general purpose input. This
input should be connected to VCC when not used. This input has no effect on
the UART.
ANCILLARY SIGNALS
XTAL1
25
35
I
Crystal or external clock input.
XTAL2
26
36
O
Crystal or buffered clock output.
16/68#
-
31
I
Intel or Motorola Bus Select (input with internal pull-up).
When 16/68# pin is HIGH, 16 or Intel Mode, the device will operate in the Intel
bus type of interface.
When 16/68# pin is LOW, 68 or Motorola mode, the device will operate in the
Motorola bus type of interface.
Motorola bus interface is not available on the 64 pin package.
RESET
(RESET#)
27
37
I
When 16/68# pin is HIGH for Intel bus interface, this input becomes the Reset
pin (active high). In this case, a 40 ns minimum HIGH pulse on this pin will
reset the internal registers and all outputs. The UART transmitter output will be
held HIGH, the receiver input will be ignored and outputs are reset during reset
period (Table 13). When 16/68# pin is at LOW for Motorola bus interface, this
input becomes Reset# pin (active low). This pin functions similarly, but instead
of a HIGH pulse, a 40 ns minimum LOW pulse will reset the internal registers
and outputs.
Motorola bus interface is not available on the 64 pin package.
VCC
4, 21, 35,
52
13, 30,
47, 64
Pwr
2.97V to 5.5V power supply.
GND
14, 28,
45, 61
6, 23, 40,
57
Pwr
Power supply common, ground.
N.C.
-
No Connection. These pins are not used in either the Intel or Motorola bus
modes.
Pin Description
NAME
64-LQFP
PIN #
68-PLCC
PIN#
TYPE
DESCRIPTION
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