參數(shù)資料
型號(hào): SST89V54RD-33-I-PIE
廠商: SILICON STORAGE TECHNOLOGY INC
元件分類(lèi): 微控制器/微處理器
英文描述: 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PDIP40
封裝: ROHS COMPLIANT, PLASTIC, MS-011AC, DIP-40
文件頁(yè)數(shù): 52/81頁(yè)
文件大?。?/td> 935K
代理商: SST89V54RD-33-I-PIE
56
Data Sheet
FlashFlex51 MCU
SST89E52RD2/RD / SST89E54RD2/RD / SST89E58RD2/RD
SST89V52RD2/RD / SST89V54RD2/RD / SST89V58RD2/RD
2006 Silicon Storage Technology, Inc.
S71255-05-000
5/06
9.4 Read Operation Under Lock Condition
The status of security bits SB1, SB2, and SB3 can be read
when the read command is disabled by security lock.
There are three ways to read the status.
1. External host mode: Read-back = 00H (locked)
2. IAP command: Read-back = previous SFDT data
3. MOVC: Read-back = FFH (blank)
TABLE
9-1: Security Lock Options
Level
Security Lock Bits1,2
Security Status of:
Security Type
SFST[7:5]
SB1
SB21
SB31
Block 1
Block 0
1
000
U
Unlock
No Security Features are Enabled.
2
100
P
U
SoftLock
MOVC instructions executed from
external program memory are dis-
abled from fetching code bytes from
internal memory, EA# is sampled and
latched on Reset, and further pro-
gramming of the flash is disabled.
3
011
101
U
P
U
P
Hard Lock
Level 2 plus Verify disabled, both
blocks locked.
010
U
P
U
SoftLock
Level 2 plus Verify disabled. Code in
Block 1 may program Block 0 and vice
versa.
110
001
P
U
P
U
P
Hard Lock
SoftLock
Level 2 plus Verify disabled. Code in
Block 1 may program Block 0.
4
111
P
Hard Lock
Same as Level 3 hard lock/hard lock,
but MCU will start code execution
from the internal memory regardless
of EA#.
T9-1.0 1255
1. P = Programmed (Bit logic state = 0), U = Unprogrammed (Bit logic state = 1).
2. SFST[7:5] = Security Lock Status Bits (SB1_i, SB2_i, SB3_i)
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