參數(shù)資料
型號(hào)： SST89E54RC-33-C-PIE
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PDIP40
封裝： ROHS COMPLIANT, PLASTIC, MS-011AC, DIP-40
文件頁(yè)數(shù)： 35/57頁(yè)
文件大?。?/td> 652K
代理商： SST89E54RC-33-C-PIE
40
Data Sheet
FlashFlex MCU
SST89E52RC / SST89E54RC
2007 Silicon Storage Technology, Inc.
S71259-04-000
1/07
9.2 Boot Sequence
After Power On Reset, the device can boot from one of
three locations: zero, default boot vector (see Table 4-2), or
a user-defined boot vector. The checking sequence follows
the flowchart in Figure 9-2. If the device uses external code
memory (EA#=0), the boot-start address is always zero.
The next sequence is to detect any external hardware pin
setup.
The device should check P1[0] and P1[1] at the falling edge
of reset. (See Figure 9-3 for the timing diagram.) If both
pins are low, the device is forced to boot from either the
default boot vector or the user-defined boot vector depend-
ing on the setting of Boot_From_User_Vector_i. The
Boot_Status_Flag bit (HWIAP) in the SFCF register indi-
cates whether or not the system booted with P1[0] and
P1[1] set to low during reset. (See Section 3.5, “Special
Programming the control bits (Boot_From_User_Vector_i
and Boot_From_Zero_i) can be done through IAP mode
commands or External Host Mode commands. The factory
default setting for these two bits is “1” and will lead the sys-
tem to boot from the default boot vector per Table 4-2.
When the device is configured to boot from a user-defined
vector, users should use the Set_User_Boot_Vector com-
mand to program the Boot Vector[7:0]. The final boot vector
address is calculated in Table 9-1.
FIGURE
9-2: Boot Sequence Flowchart
FIGURE
9-3: Hardware Pin Setup
9.3 Interrupt Priority and Polling
Sequence
The device supports seven interrupt sources under a four
level priority scheme. Table 9-2 and Figure 9-4 summarize
the polling sequence of the supported interrupts.
TABLE
9-1: Boot Vector Address
Device
Bit Number
15
14
13
12
11
10
9
876
5432
10
SST89E54RC
00
Boot Vector[7:0]
0000
00
SST89E52RC
0
Boot Vector[7:0]
0
T9-1.1 1259
Power on
Boot_From_User_Vector_i
bit cleared?
(=0)
Yes
No
Boot_From_Zero_i
bit cleared?
(=0)
No
Default
Address 0
Boot Vector
Boot from External
No
Both
P1.0 and P1.1
are low?
1259 FC_Boot_Seq.0
No
Reset
EA#
P1.0
P1.1
1259 F26.0
300 Clk
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