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參數資料
| 型號： | SST55LD019B-45-C-BW |
| 廠商： | SILICON STORAGE TECHNOLOGY INC |
| 元件分類： | 存儲控制器/管理單元 |
| 英文描述： | FLASH MEMORY DRIVE CONTROLLER, PBGA84 |
| 封裝： | MO-210, TFBGA-84 |
| 文件頁數： | 13/76頁 |
| 文件大?。?/td> | 711K |
| 代理商： | SST55LD019B-45-C-BW |
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Advance Information
ATA Flash Disk Controller
SST55LD019A / SST55LD019B / SST55LD019C
2004 Silicon Storage Technology, Inc.
S71241-02-000
4/04
11.1.2.9 Status & Alternate Status Registers (Read Only)
These registers return the ATA Flash Disk Controller status when read by the host. Reading the Status register does
clear a pending interrupt while reading the alternate Status register does not. The meaning of the status bits are
described as follows:
Symbol
Function
BUSY
The busy bit is set when the ATA Flash Disk Controller has access to the command
buffer and registers and the host is locked out from accessing the Command register and
buffer. No other bits in this register are valid when this bit is set to a 1.
RDY
RDY indicates whether the device is capable of performing ATA Flash Disk Controller
operations. This bit is cleared at power up and remains cleared until the ATA Flash Disk
Controller is ready to accept a command.
DWF
This bit, if set, indicates a write fault has occurred.
DSC
This bit is set when the ATA Flash Disk Controller is ready.
DRQ
The Data-Request bit is set when the ATA Flash Disk Controller requires that information
be transferred either to or from the host through the Data register.
CORR
This bit is set when a correctable data error has been encountered and the data has
been corrected. This condition does not terminate a multi-sector Read operation.
ERR
This bit is set when the previous command has ended in some type of error. The bits in
the Error register contain additional information describing the error. It is recommended
that media access commands (such as Read-Sectors and Write-Sectors) that end with
an error condition should have the address of the first sector in error in the command
block registers.
11.1.2.10 Device Control Register (Write Only)
This register is used to control the ATA Flash Disk Controller interrupt request and to issue a software reset. This
register can be written to even if the device is busy. The bits are defined as follows:
Symbol
Function
SW Rst
This bit is set to 1 in order to force the ATA Flash Disk Controller to perform a software
Reset operation. The chip remains in reset until this bit is reset to ‘0.’
-IEn
0: The Interrupt Enable bit enables interrupts
1: Interrupts from the ATA Flash Disk Controller are disabled
This bit is set to 0 at Power-on and Reset.
D7
D6
D5
D4
D3
D2
D1
D0
Reset Value
BUSY
RDY
DWF
DSC
DRQ
CORR
0
ERR
1000 0000b
D7
D6
D5
D4
D3
D2
D1
D0
Reset Value
XXX
X
1
SW Rst
-IEn
0
0000 1000b
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| SST55VD020-60-I-TQWE | IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PQFP100 |
| SST55VD020-60-C-MVWE | IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PBGA85 |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SST55LD019B-45-C-BWE | 功能描述:總線收發(fā)器 ATA Media 45MHz 3.3V Commercial RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SST55LD019B-45-C-MVWE | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:ATA Flash Disk Controller |
| SST55LD019B-45-C-TQWE | 功能描述:總線收發(fā)器 ATA Flash Disk Cntlr RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SST55LD019B-45-I-BWE | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:ATA Flash Disk Controller |
| SST55LD019B-45-I-MVWE | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:ATA Flash Disk Controller |
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