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參數(shù)資料
| 型號(hào)： | SSM2120 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號(hào)調(diào)理 |
| 英文描述： | Dynamic Range Processors/Dual VCA |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDIP22 |
| 封裝： | PLASTIC, DIP-22 |
| 文件頁數(shù)： | 4/12頁 |
| 文件大小： | 371K |
| 代理商： | SSM2120 |
SSM2120/SSM2122
REV. C
–4–
2V
FULL
WAVE
RECTIFIER
|I
IN
|
V+
THRESH
LOG AV
V–
CON
OUT
REC
IN
Q1
Q2
I
REF
1k
39k
200
R
CON
TO V
C
R
IN
INPUT
V–
R
REF
C
AV
Figure 3. Level Detector
Note: It is natural to assume that with the addition of the
averaging capacitor, the LOG AV output would become the
average of the log of the absolute value of I
IN
. However, since the
capacitor forces an ac ground at the emitter of the output
transistor, the capacitor charging currents are proportional to
the
antilog
of the voltage at the base of the output transistor.
Since the base voltage of the output transistor is the log of the
absolute value of I
IN
, the log and antilog terms cancel, so the
capacitor becomes a linear integrator with a charging current
directly proportional to the absolute value of the input current.
This effectively inverts the order of the averaging and logging
functions. The signal at the output therefore is the
log of the
average of the absolute value of I
IN
.
USING DETECTOR PINS REC
IN
, LOG
AV
, THRESH AND
CON
OUT
When applying signals to REC
IN
(rectifier input) an input series
resistor should be followed by a low leakage blocking capacitor
since REC
IN
has a dc voltage of approximately 2.1 V above
ground. Choose R
IN
for a
±
1.5 mA peak signal. For
±
15 V
operation this corresponds to a value of 10 k
.
A 1.5 M
value of R
REF
from log average to –15 V will establish
a 10
μ
A reference current in the logging transistor (Q
1
). This
will bias the transistor in the middle of the detector’s dynamic
current range in dB to optimize dynamic range and accuracy.
The LOG AV outputs are buffered and amplified by unipolar
drive op amps. The 39 k
, 1 k
resistor network at the
THRESH pin provides a gain of 40.
An attenuator from the CON
OUT
(control output) to the
appropriate VCA control port establishes the control sensitivity.
Use 200
for the attenuator resistor to ground and choose
R
CON
for the desired sensitivity. Care should be taken to minimize
capacitive loads on the control outputs CON
OUT
. If long lines
or capacitive loads are present, it is best to connect the series
resistor R
CON
as closely to the CON
OUT
pin as possible.
DYNAMIC LEVEL DETECTOR CHARACTERISTICS
Figures 4 and 5 show the dynamic performance of the level
detector to a change in signal level. The input to the detector (not
shown) is a series of 500 ms tone bursts at 1 kHz in successive
10 dBV steps. The tone bursts start at a level of –60 dBV (with
R
IN
= 10 k) and return to –60 dBV after each successive 10 dB
step. Tone bursts range from –60 dBV to +10 dBV. Figure 4
shows the logarithmic level detector output. The output of the
detector is 3 mV/dB at LOG AV and the amplifier gain is 40
which yields 120 mV/dB. Thus, the output at CON
OUT
is seen
to increase by 1.2 V for each 10 dBV increase in input level.
TRIMMING THE VCAs
The control feedthrough (CFT) pins are optional control feed-
through null points. CFT nulling is usually required in applications
such as noise gating and downward expansion. If trimming is
not used, leave the CFT pins open.
Trim Procedure
1. Apply a 100 Hz sine wave to the control point attenuator.
The signal peaks should correspond to the control voltages
which induce the VCAs maximum intended gain and at least
30 dB of attenuation.
2. Adjust the 50 k
potentiometer for the minimum
feedthrough.
(Trimmed control feedthrough is typically well under 1 mV rms
when the maximum gain is unity using 36 k
input and output
resistors.)
Applications such as compressor/limiters typically do not require
control feedthrough trimming because the VCA operates at
unity-gain unless the signal is large enough to initiate gain
reduction. In this case the signal masks control feedthrough.
This trim is ineffective for voltage-controlled filter applications.
LEVEL DETECTION CIRCUITS
The SSM2120 contains two independent level detection
circuits. Each circuit contains a wide dynamic range full-wave
rectifier, logging circuit and a unipolar drive amplifier. These
circuits will accurately detect the input signal level over a
100 dB range from 30 nA to 3 mA peak-to-peak.
LEVEL DETECTOR THEORY OF OPERATION
Referring to the level detector block diagram of Figure 3, the
REC
IN
input is an AC virtual ground. The next block imple-
ments the full-wave rectification of the input current. This
current is then fed into a logging transistor (Q
1
) whose pair
transistor (Q
2
) has a fixed collector current of I
REF
. The LOG
AV output is then:
V
LOG
AV
=
kT
q
ln|
I
IN
|
I
REF
With the use of the LOG AV capacitor the output is then the log
of the average of the absolute value of I
IN
.
(The unfiltered LOG AV output has broad flat plateaus with
sharp negative spikes at the zero crossing. This reduces the
“work” that the averaging capacitor must do, particularly at low
frequencies.)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SSM2122 | Dynamic Range Processors/Dual VCA |
| SSM-2134 | LOW NOISE AUDIO OPERATIONAL AMPLIFIER |
| SSM2134 | LOW NOISE AUDIO OPERATIONAL AMPLIFIER |
| SSM-2404 | Quad Audio Switch |
| SSM2404 | Quad Audio Switch |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SSM-2120 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dynamic Range Processors/Dual VCA |
| SSM2120P | 制造商:Analog Devices 功能描述:DUAL VOLT ATTENUATOR 2120 DIP22 |
| SSM2122 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dynamic Range Processors/Dual VCA |
| SSM-2122 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dynamic Range Processors/Dual VCA |
| SSM2122P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Amplifier. Other |
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