參數(shù)資料
型號: SS-90S8515-J
英文描述: SOCKET STEALER AVR LCC
中文描述: 插座偷竊者AVR的持有LCC
文件頁數(shù): 8/14頁
文件大?。?/td> 569K
代理商: SS-90S8515-J
89S /AV R(90S )
S oc ket S tealer
Equinox Technologies UK Limited
UK Contact Details
3 Atlas House, St. Georges Square, Bolton BL1 2HB England
Tel: +44 (0) 1204 529000 Fax: +44 (0) 1204 535555
E-mail:
sales@equinox-tech.com
Web site:
www.equinox-tech.com
US/Canada Contact Numbers
Tel: 1-800-216-1777 Fax: 1-800-234-0941
2.3.1 Links B1 and B2 – Microcontroller and Target Circuit Selection
The Socket Stealer may plug into a target circuit that has been designed for an Atmel 90S4414/8535 AVR microcontroller or a
generic 8051 microcontroller (please refer to the Device Support section). In addition it may accept an AVR 90S4414/8515 or
8051 89S device.
The AVR family has an active low RESET and the 8051 family has an active high RESET resulting in reset circuits for the two
families being different. In order to enable the Socket Stealer to plug into a target circuit that may have an incompatible reset
circuit for the microcontroller two links are provided, B1 and B2.
Link B1 selects the type of reset circuit on the target system. Connecting pads 1 and 2 together configures the Socket Stealer to
plug into an AVR system and connecting pads 2 and 3 together configures the Socket Stealer to plug into an 8051 system.
Link B2 selects the family of microcontroller plugged into the Socket Stealer itself. Connecting pads 1 and 2 together
configures the Socket Stealer for an AVR 90S device and connecting pads 2 and 3 together configures the Socket Stealer for an
89S device.
The way the reset circuit works on the Socket Stealer is to convert the target system RESET to active low if link B1 has 2 – 3
connected. This active low RESET signal is then ANDed with the RESET signal from the programmer, which is configured to
always be active low. Then if link B2 has 2 – 3 connected the microcontroller is an 8051 device and the RESET signal requires
inverting, producing an active high RESET. A simplified circuit diagram is shown below.
Section 3.1 details how to configure the programmer so that the RESET signal produced is always active low.
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