參數(shù)資料
型號: SRIX512
英文描述: 13.56MHZ SHORT RANGE CONTACTLESS MEMORY CHIP WITH 512-BIT EEPROM. ANTI-COLLISION AND ANTI-CLONE FUNCTIONS
中文描述: 13.56短距離非接觸式存儲器芯片,帶有512位的EEPROM。防撞擊,防克隆功能
文件頁數(shù): 2/6頁
文件大?。?/td> 120K
代理商: SRIX512
SRIX512
2/6
SUMMARY DESCRIPTION
The SRIX512 is a contactless memory, powered
by an externally transmitted radio wave. It contains
a 512-bit user EEPROM fabricated with STMicro-
electronics CMOS technology. The memory is or-
ganised as 16 blocks of 32 bits. The SRIX512 is
accessed via the 13.56MHz carrier. Incoming data
are demodulated and decoded from the received
Amplitude Shift Keying (ASK) modulation signal
and outgoing data are generated by load variation
using Bit Phase Shift Keying (BPSK) coding of a
847kHz sub-carrier. The received ASK wave is
10% modulated. The Data transfer rate between
the SRIX512 and the reader is 106Kbit/s in both
reception and emission modes.
The SRIX512 follows the ISO 14443 part 2 type B
recommendation for the radio-frequency power
and signal interface.
Figure 2. Logic Diagram
The SRIX512 targets short range applications
which need secure and re-usable products. The
SRIX512 includes an anti-collision mechanism
that allows it to detect and select tags present at
the same time within range of the reader. The anti-
collision is based on a probabilistic scanning meth-
od using slot markers. The SRIX512 provides an
anti-clone function which allows its authentication.
Using the STMicroelectronics single chip coupler,
CRX14, it is easy to design a reader with the au-
thentication capability and to build a system with a
high level of security.
Table 1. Signal Names
The SRIX512 contactless EEPROM can be ran-
domly read and written in block mode. Each block
is composed of 32 bits. It offers a set of 10 com-
mands:
I
READ_BLOCK
I
WRITE_BLOCK
I
INITIATE
I
PCALL16
I
SLOT_MARKER
I
SELECT
I
COMPLETION
I
RESET_TO_INVENTORY
I
AUTHENTICATE
I
GET_UID
The SRIX512 memory array is divided in three, as
described in Figure 3. The first area is a resettable
OTP (one time programmable) area in which bits
can only be switched from 1 to 0. Using a special
command, it is possible to erase all the bits of this
area to 1. The second area provides two 32-bit bi-
nary counters that can only be decremented from
FFFFFFFFh to 00000000h, and gives a capacity
of 4,294,967,296 units per counter. The last area
is the EEPROM area. It is accessible in blocks of
32 bits, and automatically invokes an auto-erase
cycle during each WRITE_BLOCK command.
AI08560
AC1
SRIX512
AC0
Power
Supply
Regulator
BPSK
Load
Modulator
ASK
Demodulator
512-bit
User
EEPROM
AC1
Antenna Coil
AC0
Antenna Coil
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