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參數(shù)資料
| 型號： | SPT7950SIR |
| 廠商： | SIGNAL PROCESSING TECHNOLOGIES |
| 元件分類： | ADC |
| 英文描述： | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | SSOP-28 |
| 文件頁數(shù)： | 3/5頁 |
| 文件大?。?/td> | 39K |
| 代理商： | SPT7950SIR |
SPT
3
9/6/00
SPT7950
ELECTRICAL SPECIFICATIONS
T
A
=T
MIN
to T
MAX
, V
DD
=+5.0 V, OV
DD
=+3.3 V,
S
=100 MSPS, V
RHS
=3.0 V, V
RLS
=2.0 V, unless otherwise specified.
TEST
CONDITIONS
TEST
LEVEL
SPT7950
TYP
PARAMETERS
MIN
MAX
UNITS
Digital Inputs
EXT/INT
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
Clocks
Clock Input Common Mode (V
ICM
)
Single-ended Clock Input
Input High Voltage (V
IH
)
Input Low Voltage (V
IL
)
Full Temp
Full Temp
Full Temp
Full Temp
VI
VI
VI
VI
80% V
DD
V
V
mA
mA
20% V
DD
TBD
TBD
TBD
TBD
Full Temp
V
1.5
V
Full Temp
Full Temp
VI
VI
2.0
3.0
0
5.0
0.4
V
V
Digital Outputs
Logic
“
0
”
Voltage
Logic
“
1
”
Voltage
Output Coding
I =
–
2mA
I = 2mA
VI
VI
0.2
0.4
OV
DD
V
V
85% OV
DD
90% OV
DD
Straight Binary
Power Supply Requirements
V
DD
Voltage (Analog Supply)
OV
DD
Voltage (Output Supply)
Power Dissipation
1
Power Supply Rejection Ratio
IV
IV
VI
V
4.75
2.7
5.0
3.0
550
TBD
5.25
3.3
TBD
V
V
mW
mV/V
Dynamic Performance
Signal-to-Noise Ratio (SNR)
IN
= 10 MHz
IN
= 70 MHz
Signal-to-Noise and Distortion (SINAD)
IN
= 10 MHz
IN
= 70 MHz
Effective Number of Bits
IN
= 10 MHz
IN
= 70 MHz
Second & Third Harmonic Distortion
IN
= 10 MHz
IN
= 70 MHz
Worst Harmonic (Excluding 2nd & 3rd)
IN
= 10 MHz
IN
= 70 MHz
Two-Tone Intermod Distortion (IMD)
IN1
= 29.3 MHz;
IN2
= 30.3 MHz
IN1
= 70.3 MHz;
IN2
= 71.3 MHz
1
Power Dissipation measured at
S
= 100 MSPS with a dc analog input
25
°
C
25
°
C
I
TBD
TBD
69
65
dB
dB
V
25
°
C
25
°
C
I
TBD
TBD
68
64
dB
dB
V
25
°
C
25
°
C
V
V
11.0
10.3
Bits
Bits
25
°
C
25
°
C
I
–
85
–
79
TBD
TBD
dBc
dBc
V
25
°
C
25
°
C
I
–
90
–
90
TBD
TBD
dBc
dBc
V
25
°
C
25
°
C
V
V
–
75
–
66
TBD
TBD
dBc
dBc
TEST LEVEL CODES
All electrical characteristics are subject
to the following conditions:
All parameters having min/max specifi-
cations are guaranteed. The Test Level
column indicates the specific device
testing actually performed during pro-
duction and Quality Assurance inspec-
tion. Any blank section in the data
column indicates that the specification
is not tested at the specified condition.
TEST LEVEL TEST PROCEDURE
I
100% production tested at the specified temperature.
100% production tested at T
A
= +25
°
C, and sample tested at the
specified temperatures.
QA sample tested only at the specified temperatures.
Parameter is guaranteed (but not tested) by design and characterization
data.
Parameter is a typical value for information purposes only.
100% production tested at T
A
= +25
°
C. Parameter is guaranteed over
specified temperature range.
II
III
IV
V
VI
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