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參數(shù)資料
| 型號(hào)： | SPT7868SIR |
| 廠商： | SIGNAL PROCESSING TECHNOLOGIES |
| 元件分類(lèi)： | ADC |
| 英文描述： | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | SSOP-28 |
| 文件頁(yè)數(shù)： | 1/5頁(yè) |
| 文件大小： | 40K |
| 代理商： | SPT7868SIR |
Signal Processing Technologies, Inc.
4755 Forge Road, Colorado Springs, Colorado 80907, USA
Phone: 719-528-2300
Fax: 719-528-2370
Web Site: http://www.spt.com
e-mail: sales@spt.com
SPT7868
10-BIT, 80 MSPS A/D CONVERTER
PRELIMINARY INFORMATION
APPLICATIONS
High-speed applications where low power dissipation is
required
Video imaging
Medical imaging
Radar receivers
IR imaging
Digital communications
FEATURES
80 MSPS maximum sample rate
9.2 effective number of bits at IN = 15 MHz and
S = 80 MSPS
2 VP-P full-scale input range
Differential input 2.5 V common mode
Internal or external voltage reference
Common-mode voltage reference output
+3.3 V / +5 V digital output logic compatibility
+5 V analog power supply
GENERAL DESCRIPTION
The SPT7868 is a 10-bit, 80 MSPS analog-to-digital con-
verter with low power dissipation at only 627 mW typical at
80 MSPS with a power supply of +5.0 V. The digital outputs
are +3 V or +5 V, and are user selectable. The SPT7868
has incorporated proprietary circuit design and CMOS
processing technologies to achieve its advanced perfor-
mance. Inputs and outputs are TTL/CMOS compatible to
interface with TTL/CMOS logic systems. Output data for-
mat is straight binary.
The SPT7868 is available in a 28-lead SSOP package
over the industrial temperature range.
BLOCK DIAGRAM
Bias
Cell
VCM
VDD GND
10-BIT
80 MSPS
ADC
THA
VIN
Data
Output
Latches
& Buffers
10
GND OVDD
Bandgap
Reference
2
CLK, CLK
VIN
REFH
REFL
Sleep
1
OR
EXT/INT
D0D9
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