參數(shù)資料
型號(hào): SPC560B50L3C5E0Y
廠(chǎng)商: STMICROELECTRONICS
元件分類(lèi): 微控制器/微處理器
英文描述: 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, LQFP-100
文件頁(yè)數(shù): 32/74頁(yè)
文件大?。?/td> 971K
代理商: SPC560B50L3C5E0Y
SPC560Bx, SPC560Cx
Electrical characteristics
Doc ID 14619 Rev 4
4.12.2
Electromagnetic interference (EMI)
The product is monitored in terms of emission based on a typical application. This emission
test conforms to the IEC 61967-1 standard, which specifies the general conditions for EMI
measurements.
4.12.3
Absolute maximum ratings (electrical sensitivity)
Based on two different tests (ESD and LU) using specific measurement methods, the
product is stressed in order to determine its performance in terms of electrical sensitivity.
Electrostatic discharge (ESD)
Electrostatic discharges (a positive then a negative pulse separated by 1 second) are
applied to the pins of each sample according to each pin combination. The sample size
depends on the number of supply pins in the device (3 parts*(n+1) supply pin). This test
conforms to the AEC-Q100-002/-003/-011 standard. For more details, refer to the
application note Electrostatic Discharge Sensitivity Measurement (AN1181).
Table 29.
EMI radiated emission measurement(1)(2)
Symbol C
Parameter
Conditions
Value
Unit
Min
Typ Max
SR — Scan range
0.150
1000 MHz
fCPU SR — Operating frequency
64
MHz
VDD_LV SR — LV operating voltages
1.28
V
SEMI CC T Peak level
VDD = 5V, TA =25°C,
LQFP144 package
Test conforming to IEC 61967-2,
fOSC = 8 MHz/fCPU = 64 MHz
No PLL frequency
modulation
18
dBV
± 2% PLL frequency
modulation
——
14(3) dBV
1.
EMI testing and I/O port waveforms per IEC 61967-1, -2, -4
2.
For information on conducted emission and susceptibility measurement (norm IEC 61967-4), please contact your local
marketing representative.
3.
All values need to be confirmed during device validation
Table 30.
ESD absolute maximum ratings(1) (2)
Symbol
C
Ratings
Conditions
Class
Max value
Unit
VESD(HBM) CC T
Electrostatic discharge voltage
(Human Body Model)
TA = 25 °C
conforming to AEC-Q100-002
H1C
2000
V
VESD(MM) CC T
Electrostatic discharge voltage
(Machine Model)
TA = 25 °C
conforming to AEC-Q100-003
M2
200
VESD(CDM) CC T
Electrostatic discharge voltage
(Charged Device Model)
TA = 25 °C
conforming to AEC-Q100-011
C3A
500
750 (corners)
1.
All ESD testing is in conformity with CDF-AEC-Q100 Stress Test Qualification for Automotive Grade Integrated Circuits.
2.
A device will be defined as a failure if after exposure to ESD pulses the device no longer meets the device specification
requirements. Complete DC parametric and functional testing shall be performed per applicable device specification at
room temperature followed by hot temperature, unless specified otherwise in the device specification.
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