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參數(shù)資料
| 型號： | SPAKMC332ACFV16 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | DEMMY9S |
| 中文描述： | 32-BIT, 16.78 MHz, MICROCONTROLLER, PQFP144 |
| 封裝： | QFP-144 |
| 文件頁數(shù)： | 73/88頁 |
| 文件大?。?/td> | 446K |
| 代理商： | SPAKMC332ACFV16 |
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MC68332
MC68332TS/D
MOTOROLA
73
MSTR — Master/Slave Mode Select
0 = QSPI is a slave device and only responds to externally generated serial data.
1 = QSPI is system master and can initiate transmission to external SPI devices.
MSTR configures the QSPI for either master or slave mode operation. This bit is cleared on reset and
may only be written by the CPU.
WOMQ — Wired-OR Mode for QSPI Pins
0 = Outputs have normal MOS drivers.
1 = Pins designated for output by DDRQS have open-drain drivers.
WOMQ allows the wired-OR function to be used on QSPI pins, regardless of whether they are used as
general-purpose outputs or as QSPI outputs. WOMQ affects the QSPI pins regardless of whether the
QSPI is enabled or disabled.
BITS — Bits Per Transfer
In master mode, when BITSE in a command is set, the BITS field determines the number of data bits
transferred. When BITSE is cleared, eight bits are transferred. Reserved values default to eight bits.
BITSE is not used in slave mode.
The following table shows the number of bits per transfer.
CPOL — Clock Polarity
0 = The inactive state value of SCK is logic level zero.
1 = The inactive state value of SCK is logic level one.
CPOL is used to determine the inactive state value of the serial clock (SCK). It is used with CPHA to
produce a desired clock/data relationship between master and slave devices.
CPHA — Clock Phase
0 = Data is captured on the leading edge of SCK and changed on the following edge of SCK.
1 = Data is changed on the leading edge of SCK and captured on the following edge of SCK.
CPHA determines which edge of SCK causes data to change and which edge causes data to be cap-
tured. CPHA is used with CPOL to produce a desired clock/data relationship between master and slave
devices. CPHA is set at reset.
SPBR — Serial Clock Baud Rate
The QSPI uses a modulus counter to derive SCK baud rate from the MCU system clock. Baud rate is
selected by writing a value from 2 to 255 into the SPBR field. The following equation determines the
BITS
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Bits per Transfer
16
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
8
9
10
11
12
13
14
15
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SPAKMC332ACFV20 | DEMMY9S |
| SPAKMC332AMFV16 | DAMMY15S |
| SPAKMC332AMFV20 | 32-Bit Modular Microcontroller |
| SPAKMC332AVFC16 | 32-Bit Modular Microcontroller |
| SPAKMC332AVFC20 | 32-Bit Modular Microcontroller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SPAKMC332ACFV20 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:32-Bit Modular Microcontroller |
| SPAKMC332AMFC16 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:32-Bit Modular Microcontroller |
| SPAKMC332AMFC20 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:32-Bit Modular Microcontroller |
| SPAKMC332AMFV16 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:32-Bit Modular Microcontroller |
| SPAKMC332AMFV20 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:32-Bit Modular Microcontroller |
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