參數(shù)資料
型號(hào)： SP5769AKGQP1T
廠商： Mitel Networks Corporation
英文描述： 3GHz I2C Bus Synthesiser
中文描述： 3GHz的I2C總線合成器
文件頁(yè)數(shù)： 1/11頁(yè)
文件大?。?/td> 223K
代理商： SP5769AKGQP1T
DS4878 Issue 4.0 October 1999
SP5769
3GHz I
2
C Bus Synthesiser
Preliminary information
Figure 1 SP5769 block diagram
Ordering Information
SP5769A/KG/MP1S (Tubes)
SP5769A/KG/MP1T (Tape and Reel)
SP5769A/KG/QP1S (Tubes)
SP5769A/KG/QP1T (Tape and Reel)
Features
G
Complete 3·0 GHz Single Chip System
G
Optimised for Low Phase Noise, with Comparison
Frequencies up to 4 MHz
G
No RF Prescaler
G
Selectable Reference Division Ratio
G
Selectable Reference/Comparison Frequency Output
G
Selectable Charge Pump Current with 10:1 Ratio
G
Four Selectable I
2
C Addresses
G
I
2
C Fast Mode Compliant with 3·3V and 5V Logic Levels
G
Four Switching Ports
G
Functional Replacement for SP5659 (except ADC)
G
Pin Compatible with SP5655
G
Power Consumption 110mW with V
CC
= 5·5V, all Ports off
G
ESD Protection 2kV min., MIL-STD-883B Method 3015
Cat.1 (Normal ESD handling procedures should be
observed)
Applications
G
Digital Satellite and Cable Tuning Systems
G
Communications Systems
The SP5769 is a single chip frequency synthesiser
designed for tuning systems up to 3GHz. The RF
preamplifier interfaces direct with the RF programmable
divider, which is of MN
1
A construction so giving a step
Absolute Maximum Ratings
All voltages are referred to V
EE
= 0V
Supply voltage, V
CC
RF differential input voltage
All I/O port DC offsets
SDA and SCL DC offset
Storage temperature
Junction temperature
MP16 thermal resistance
Chip to ambient,
θ
JA
Chip to case,
θ
JC
0·3V to
1
7V
2·5Vp-p
2
0·3 to V
CC
1
0·3V
2
0·3 to 6V
2
55
°
C to
1
125
°
C
1
150
°
C
80
°
C/W
20
°
C/W
size equal to the loop comparison frequency and no
prescaler phase noise degradation over the full RF
operating range. The comparison frequency is obtained
either from an on-chip crystal controlled oscillator, or from
an external source. The oscillator frequency, f
REF
, or phase
comparator frequency, f
COMP
, can be switched to the REF/
COMP output providing a reference for a second frequency
synthesiser. The synthesiser is controlled via an 1
2
C bus
4-BIT LATCH AND
PORT INTERFACE
4
16/17
4-BIT
COUNT
11-BIT
COUNT
15-BIT LATCH
REFERENCE
DIVIDER
REF/COMP
CRYSTAL CAP
CRYSTAL
CHARGE PUMP
DRIVE
I
2
C BUS
TRANSCEIVER
ADDRESS
SDA
SCL
RF
INPUT
P3
11
2
3
1
16
6
13
14
10
4
5
PUMP
2 BIT
4 BIT
2 BIT
3 BIT
7
8
9
P2
P1
P0
CP TEST
MODE SET
LOCK
f
PD
/2
f
PD
/2 SELECT
ENABLE/
SELECT
相關(guān)PDF資料
PDF描述
SP5769 3GHz IIC Bus Synthesiser(3GHz IIC總線頻率合成器)
SP5848 2.2/1.3GHz 3-Wire Bus Dual Low Phase Noise PLL(2.2/1.3GHz 三線總線雙低噪聲鎖相環(huán))
SP8400 Very Low Phase Noise Synthesiser Divider(極低相位噪聲可編程合成除法器)
SP8401 Very Low Phase Noise 300MHz ÷10/11(300MHz ÷10/11 極低相位噪聲可變模數(shù)除法器)
SP8402 Very Low Phase Noise Divider by 2^N(極低相位噪聲除法器（從2^1到2^8選擇除法速率）)
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