SP510
34
ULTRA HIGH SPEED MULTIPROTOCOL TRANSCEIVER
REV. 1.0.1
FIGURE 47. TYPICAL OPERATING CONFIGURATION TO SERIAL PORT CONNECTOR WITH DCE/DTE PROGRAMMABIL-
ITY
20
(V
.11,
V.28)
DTR_DSR_A
23
(V
.11)
DTR_DSR_B
1μ
F
1μ
F
1μ
F
V CC
V DD
C1-
C2-
V SS
C1+
C2+
1μ
F
SP510
TxD
TxCE
ST
RT
S
DTR
DCD_DCE
RL
RxC
TxC
CTS
DSR
DCD_DTE
RI
TM
10μ
F
μDB-26
Serial
Port
Connector
Pins
Signal
(DTE_DCE)
2(V
.11,
V.35,
V.28)
TXD_RXD_A
14
(V
.11,
V.35)
TXD_RXD_B
11
(V
.11,
V.35)
TXCE_TXC_B
25
(V
.10,
V.28)
LL_TM
15
(V
.11,
V.35,
V.28)
*TXC_RXC_A
12
(V
.11,
V.35)
*TXC_RXC_B
SDEN
24
(V
.11,
V.35,
V.28)
TXCE_TXC_A
3(V
.11,
V.35,
V.28)
RXD_TXD_A
16
(V
.11,
V.35)
RXD_TXD_B
8(V
.11,
V.28)
DCD_DCD_A
10
(V
.11)
DCD_DCD_B
Typical
SP510
DB-26
Ser
ial
Por
tConfiguration
Customer
:
Title
:
Date
:
Doc.
#
:
Re
v.
0
Refer
ence
Design
Schematic
SIGNAL
GND
(10
Pins)
9(V
.11,
V.35)
RXC_TXCE_B
17
(V
.11,
V.35,
V.28)
RXC_TXCE_A
LLEN
STEN
GND
*-
Dr
iver
applies
f
or
DCE
only
on
pins
15
and
12.
Receiv
er
applies
for
DTE
only
on
pins
15
and
12.
+5V
#103
(TxD)
#108
(DTR)
#105
(R
TS)
#141
(LL)
#105
(RXD)
#115
(RXC)
#106
(CTS)
#107
(DSR)
#109
(DCD)
DTE
I/O
Lines
represented
bydoub
learrowhead
signifies
abi-directional
bus
.
Input
Line
Output
Line
#114
(TxC)
#113
(TXCE)
#109
(DCD)
DCE
LL
RxD
TTEN
TREN
RSEN
RRCEN RLEN
RDEN
TMEN
TxCEN
RTEN
DMEN
CSEN
RR
TEN
ICEN
V10_GND
V35TGND1
V35TGND2
V35TGND3
V35RGND
TERM_OFF
D_LA
TCH
D0
D1
D2
Charge
Pump
Section
Transceiv
erSection
Logic
Section
VL
21
(V
.10,
V.28)
RL_RI
22
(V
.10,
V.28)
RI_RL
18
(V
.10,
V.28)
LL_TM
#125
(RI)
#142
(TM)
#140
(RL)
DCE/DTE
Dr
iver
applies
f
or
DCE
only
on
pins
8
and
10.
Receiv
er
applies
for
DTE
only
on
pins
8
and
10.
LOOPBA
CK
VL
19
(V
.11)
RTS_CTS_B
4(V
.11,
V.28)
RTS_CTS_A
6(V
.11,
V.28)
DSR_DTR_A
22
(V
.11)
DSR_DTR_B
13
(V
.11)
CTS_R
TS_B
5(V
.11,
V.28)
CTS_R
TS_A
VL
Logic
Voltage