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參數(shù)資料
| 型號： | SP238AET-L/TR |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DVR/RCVR RS232 MULTI 24WSOIC |
| 標準包裝： | 1,500 |
| 類型： | 收發(fā)器 |
| 驅動器/接收器數(shù)： | 4/4 |
| 規(guī)程： | RS232 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SOIC（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 24-SOIC W |
| 包裝： | 帶卷 (TR) |
5
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (50)668-707 www.exar.com
SP238A_00_0740
Phase 1
Vss charge store and double: The positive ter-
minals of capacitors C and C2 are charged
from Vcc with their negative terminals initially
connected to ground. C+ is then connected
to ground and the stored charge from C- is
superimposed onto C2-. Since C2+ is still con-
nected to Vcc the voltage potential across C2 is
now 2 x Vcc.
Phase 2
Vss transfer and invert: Phase two connects
the negative terminal of C2 to the Vss storage
capacitor and the positive terminal of C2 to
ground. This transfers the doubled and inverted
(V-) voltage onto C4. Meanwhile, capacitor C
is charged from Vcc in order to prepare it for its
next phase.
Phase 3
Vdd charge store and double: Phase three is
identicaltothefirstphase.Thepositivetermi-
nals of C and C2 are charged from Vcc with
their negative terminals initially connected to
ground. C+ is then connected to ground and
the stored charge from C- is superimposed
onto C2-. Since C2+ is still connected to Vcc
the voltage potential across capacitor C2 is now
2 x Vcc.
Phase 4
Vdd transfer: The fourth phase connects the
negative terminal of C2 to ground and the posi-
tive terminal of C2 to the Vdd storage capacitor .
This transfers the doubled (V+) voltage onto C3.
Meanwhile, capacitor C is charged from Vcc to
prepare it for its next phase.
Under lightly loaded conditions, the intelligent
pumposcillatormaximizesefficiencybyrunning
only as needed to maintain V+ and V- voltage
levels. Since interface transceivers spend most
oftheirtimeatidle,thispower-efficientinnova-
tion can greatly reduce total power consump-
tion. This improvement is made possible by
the independent phase sequences of the Exar
charge pump design.
DeScRiPtion
The clock rate of the charge pump typically op-
erates greater than 70kHz allowing the pump to
operateefficientlyusingsmall0.1uFcapacitors.
Efficientoperationdependsontherapidcharg-
ing and discharging of C and C2. Therefore,
the capacitors should be mounted as close as
possible to the IC and have a low ESR (equiva-
lent series resistance). Inexpensive, surface
mount ceramic capacitors are ideal for use on
charge pump. If polarized capacitors are used
the positive and negative terminals should be
connected as shown on the typical operating
circuit. A diagram of the 4 individual phases is
shown in Figure .
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