- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98121 > SNJ54LV574AFK (TEXAS INSTRUMENTS INC) LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, CQCC20 PDF資料下載
參數(shù)資料
| 型號： | SNJ54LV574AFK |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, CQCC20 |
| 封裝： | CERAMIC, LCC-20 |
| 文件頁數(shù)： | 12/23頁 |
| 文件大?。?/td> | 888K |
| 代理商： | SNJ54LV574AFK |
SN54LV574A, SN74LV574A
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCLS412I APRIL 1998 REVISED APRIL 2005
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2-V to 5.5-V VCC operation.
These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively
low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data
(D) inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or high-impedance state. In the high-impedance state, the outputs neither load nor drive the
bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines
without need for interface or pullup components.
OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
terminal assignments
1234
A
1D
OE
VCC
1Q
B
3D
3Q
2D
2Q
C
5D
4D
5Q
4Q
D
7D
7Q
6D
6Q
E
GND
8D
CLK
8Q
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUT
OE
CLK
D
OUTPUT
Q
L
↑
H
L
↑
LL
L
H or L
X
Q0
H
X
Z
GQN PACKAGE
(TOP VIEW)
1
234
A
B
C
D
E
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN74LV574PWLE | LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| SN74LV594ADBLE | LV/LV-A/LVX/H SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16 |
| SN74LV594APWLE | LV/LV-A/LVX/H SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16 |
| SN74LV594ADB | LV/LV-A/LVX/H SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16 |
| SN74LV594ANSRG4 | LV/LV-A/LVX/H SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SNJ54LVC00AFK | 制造商:Texas Instruments 功能描述: 制造商:Texas Instruments 功能描述:QUADRUPLE 2-INPUT POSITIVE-NAND GATE |
| SNJ54LVC00AJ | 制造商:Texas Instruments 功能描述:5962-9753301QCA, QUAD 2-IN POS-NAND GATE - Rail/Tube |
| SNJ54LVC00AW | 制造商:Texas Instruments 功能描述: |
| SNJ54LVC02AFK | 制造商:Texas Instruments 功能描述: |
| SNJ54LVC02AW | 制造商:Texas Instruments 功能描述:NOR Gate 4-Element 2-IN CMOS 14-Pin CFPAK Tube |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。