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參數(shù)資料
| 型號(hào)： | SNJ54LV138AW |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 編、解碼器及復(fù)用、解復(fù)用 |
| 英文描述： | LV/LV-A/LVX/H SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDFP16 |
| 封裝： | CERAMIC, DFP-16 |
| 文件頁(yè)數(shù)： | 1/22頁(yè) |
| 文件大?。?/td> | 766K |
| 代理商： | SNJ54LV138AW |
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www.ti.com
FEATURES
3
2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
Y1
Y2
NC
Y3
Y4
C
G2A
NC
G2B
G1
B
A
NC
Y6
Y5
V
Y0
Y7
GND
NC
SN54LV138A . . . FK PACKAGE
(TOP VIEW)
CC
NC No internal connection
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A
B
C
G2A
G2B
G1
Y7
GND
VCC
Y0
Y1
Y2
Y3
Y4
Y5
Y6
SN54LV138A . . . J OR W PACKAGE
SN74LV138A . . . D, DB, DGV, NS
OR PW PACKAGE
(TOP VIEW)
SN74LV138A . . . RGY PACKAGE
(TOP VIEW)
1
16
8
9
2
3
4
5
6
7
15
14
13
12
11
10
Y0
Y1
Y2
Y3
Y4
Y5
B
C
G2A
G2B
G1
Y7
A
Y6
V
GND
CC
DESCRIPTION/ORDERING INFORMATION
SN54LV138A, SN74LV138A
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS395L – APRIL 1998 – REVISED AUGUST 2005
2-V to 5.5-V V
CC Operation
I
off Supports Partial-Power-Down Mode
Operation
Max t
pd of 9.5 ns at 5 V
Latch-Up Performance Exceeds 250 mA Per
Typical V
OLP (Output Ground Bounce)
JESD 17
<0.8 V at V
CC = 3.3 V, TA = 25°C
ESD Protection Exceeds JESD 22
Typical V
OHV (Output VOH Undershoot)
>2.3 V at V
CC = 3.3 V, TA = 25°C
– 2000-V Human-Body Model (A114-A)
Support Mixed-Mode Voltage Operation on All
– 200-V Machine Model (A115-A)
Ports
– 1000-V Charged-Device Model (C101)
The 'LV138A devices are 3-line to 8-line decoders/demultiplexers designed for 2-V to 5.5-V VCC operation.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
QFN – RGY
Reel of 1000
SN74LV138ARGYR
LV138A
Tube of 40
SN74LV138AD
SOIC – D
LV138A
Reel of 2500
SN74LV138ADR
SOP – NS
Reel of 2000
SN74LV138ANSR
74LV138A
–40
°C to 85°C
SSOP – DB
Reel of 2000
SN74LV138ADBR
LV138A
Tube of 90
SN74LV138APW
TSSOP – PW
Reel of 2000
SN74LV138APWR
LV138A
Reel of 250
SN74LV138APWT
TVSOP – DGV
Reel of 2000
SN74LV138ADGVR
LV138A
CDIP – J
Tube of 25
SNJ54LV138AJ
–55
°C to 125°C
CFP – W
Tube of 150
SNJ54LV138AW
LCCC – FK
Tube of 55
SNJ54LV138AFK
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRO-
Copyright 1998–2005, Texas Instruments Incorporated
DUCTION DATA information current as of publication date. Prod-
ucts conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily
include testing of all parameters.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN74LV138APWT | LV/LV-A/LVX/H SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16 |
| SN74LV138ARGYR | LV/LV-A/LVX/H SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PQCC16 |
| SNJ54LV157AW | LV/LV-A/LVX/H SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, CDFP16 |
| SNJ54LV161AJ | LV/LV-A/LVX/H SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, CDIP16 |
| SN74LV161ADRG4 | LV/LV-A/LVX/H SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO16 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
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| SNJ54LVC00AJ | 制造商:Texas Instruments 功能描述:5962-9753301QCA, QUAD 2-IN POS-NAND GATE - Rail/Tube |
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