參數(shù)資料
型號(hào)： SNJ54HC148FKR
廠商： TEXAS INSTRUMENTS INC
元件分類(lèi)： 算術(shù)邏輯單元
英文描述： HC/UH SERIES, 8-BIT ENCODER, INVERTED OUTPUT, CQCC20
封裝： CERAMIC, LCC-20
文件頁(yè)數(shù)： 19/21頁(yè)
文件大?。?/td> 814K
代理商： SNJ54HC148FKR
SN54HC148, SN74HC148
8LINE TO 3LINE PRIORITY ENCODERS
SCLS109G MARCH 1984 REVISED APRIL 2004
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
0 1
23
4
5
67 EI
EO A0
A1
A2 GS
’HC148
0 1
23
4
5
67 EI
EO
A0
A1
A2
GS
’HC148
’HC08
0 1
2 3
4
5
6 7
8 9 10 11 12 13 14 15
Enable
(active low)
01
2
3
Encoded Data (active low)
Priority Flag
(active low)
16-Line Data (active low)
0 1
23
4
5
67 EI
EO A0
A1
A2 GS
’HC148
0 1
23
4
5
67 EI
EO
A0
A1
A2
GS
’HC148
’HC00
0 1
2 3
4
5
6 7
8 9 10 11 12 13 14 15
Enable
(active low)
01
2
3
Encoded Data (active high)
Priority Flag
(active high)
16-Line Data (active low)
Figure 2. Priority Encoder for 16 Bits
Because the ’HC148 devices are combinational logic circuits, wrong addresses can appear during input transients.
Moreover, a change from high to low at EI can cause a transient low on GS when all inputs are high. This must be
considered when strobing the outputs.
相關(guān)PDF資料
PDF描述
SN74HC148D HC/UH SERIES, 8-BIT ENCODER, INVERTED OUTPUT, PDSO16
SNJ54HC14FK HC/UH SERIES, HEX 1-INPUT INVERT GATE, CQCC20
SN74HC14DG4 HC/UH SERIES, HEX 1-INPUT INVERT GATE, PDSO14
SN74HC14DR HC/UH SERIES, HEX 1-INPUT INVERT GATE, PDSO14
SNJ54HC14FKR HC/UH SERIES, HEX 1-INPUT INVERT GATE, CQCC20
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