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參數(shù)資料
| 型號(hào)： | SNJ54F74FK |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 鎖存器 |
| 英文描述： | F/FAST SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CQCC20 |
| 封裝： | CERAMIC, LCC-20 |
| 文件頁(yè)數(shù)： | 10/16頁(yè) |
| 文件大?。?/td> | 672K |
| 代理商： | SNJ54F74FK |
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SN54F74, SN74F74
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLEAR AND PRESET
SDFS046A – MARCH 1987 – REVISED OCTOBER 1993
2–3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions
SN54F74
SN74F74
UNIT
MIN
NOM
MAX
MIN
NOM
MAX
UNIT
VCC
Supply voltage
4.5
5
5.5
4.5
5
5.5
V
VIH
High-level input voltage
2
V
VIL
Low-level input voltage
0.8
V
IIK
Input clamp current
–18
mA
IOH
High-level output current
–1
mA
IOL
Low-level output current
20
mA
TA
Operating free-air temperature
–55
125
0
70
°C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
SN54F74
SN74F74
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
VIK
VCC = 4.5 V,
II = – 18 mA
– 1.2
V
VOH
VCC = 4.5 V,
IOH = – 1 mA
2.5
3.4
2.5
3.4
V
VOH
VCC = 4.75 V,
IOH = – 1 mA
2.7
V
VOL
VCC = 4.5 V,
IOL = 20 mA
0.3
0.5
0.3
0.5
V
II
VCC = 5.5 V,
VI = 7 V
0.1
mA
IIH
VCC = 5.5 V,
VI = 2.7 V
20
A
IIL
Data, CLK
VCC =5 5V
VI =0 5V
– 0.6
mA
IIL
PRE or CLR
VCC = 5.5 V,
VI = 0.5 V
– 1.8
mA
IOS
VCC = 5.5 V,
VO = 0
–60
–150
–60
–150
mA
ICC
VCC = 5.5 V,
See Note 2
10.5
16
10.5
16
mA
All typical values are at VCC = 5 V, TA = 25°C.
Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
NOTE 2: ICC is measured with D, CLK, and PRE grounded then with D, CLK, and CLR grounded.
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
VCC = 5 V,
TA = 25°C
SN54F74
SN74F74
UNIT
′F74
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
fclock
Clock frequency
0
100
0
80
0
100
MHz
t
Pulse duration
CLK high, PRE or CLR low
4
ns
tw
Pulse duration
CLK low
5
6
5
ns
Setup time data before CLK
↑
High
2
3
2
tsu
Setup time, data before CLK
↑
Low
3
4
3
ns
su
Setup time, inactive-state before CLK
↑§ PRE or CLR to CLK
2
3
2
th
Hold time data after CLK
↑
High
1
2
1
ns
th
Hold time, data after CLK
↑
Low
1
2
1
ns
§ Inactive-state setup time is also referred to as recovery time.
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