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參數(shù)資料
| 型號： | SNJ54BCT8244AFKR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | BCT/FBT SERIES, DUAL 4-BIT BOUNDARY SCAN DRIVER, TRUE OUTPUT, CQCC28 |
| 封裝： | CERAMIC, LCC-28 |
| 文件頁數(shù)： | 29/29頁 |
| 文件大?。?/td> | 618K |
| 代理商： | SNJ54BCT8244AFKR |
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SN54BCT8244A, SN74BCT8244A
SCAN TEST DEVICES
WITH OCTAL BUFFERS
SCBS042E FEBRUARY 1990 REVISED JULY 1996
9
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
Table 1. Boundary-Scan Register Configuration
BSR BIT
NUMBER
DEVICE
SIGNAL
BSR BIT
NUMBER
DEVICE
SIGNAL
BSR BIT
NUMBER
DEVICE
SIGNAL
17
1OE
15
1A1
7
1Y1
16
2OE
14
1A2
6
1Y2
13
1A3
5
1Y3
12
1A4
4
1Y4
11
2A1
3
2Y1
10
2A2
2
2Y2
9
2A3
1
2Y3
8
2A4
0
2Y4
boundary-control register
The boundary-control register (BCR) is two bits long. The BCR is used in the context of the RUNT instruction
to implement additional test operations not included in the basic SCOPE
instruction set. Such operations
include PRPG and PSA. Table 3 shows the test operations that are decoded by the BCR.
During Capture-DR, the contents of the BCR are not changed. At power up or in Test-Logic-Reset, the BCR is
reset to the binary value 10, which selects the PSA test operation. The BCR order of scan is shown in Figure 3.
TDO
TDI
Bit 1
(MSB)
Bit 0
(LSB)
Figure 3. Boundary-Control Register Order of Scan
bypass register
The bypass register is a 1-bit scan path that can be selected to shorten the length of the system scan path,
thereby reducing the number of bits per test pattern that must be applied to complete a test operation.
During Capture-DR, the bypass register captures a logic 0. The bypass register order of scan is shown in
Figure 4.
Bit 0
TDO
TDI
Figure 4. Bypass Register Order of Scan
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