
SN54BCT574, SN74BCT574
OCTAL TRANSPARENT D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCBS074C SEPTEMBER 1991 REVISED MARCH 2003
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
recommended operating conditions (see Note 3)
SN54BCT574
SN74BCT574
UNIT
MIN
NOM
MAX
MIN
NOM
MAX
UNIT
VCC
Supply voltage
4.5
5
5.5
4.5
5
5.5
V
VIH
High-level input voltage
2
V
VIL
Low-level input voltage
0.8
V
IIK
Input clamp current
18
mA
IOH
High-level output current
12
15
mA
IOL
Low-level output current
48
64
mA
TA
Operating free-air temperature
55
125
0
70
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
SN54BCT574
SN74BCT574
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
VIK
VCC = 4.5 V,
II = 18 mA
1.2
V
IOH = 3 mA
2.4
3.3
2.4
3.3
VOH
VCC = 4.5 V
IOH = 12 mA
2
3.2
V
VOH
VCC
4.5 V
IOH = 15 mA
2
3.1
V
45V
IOL = 48 mA
0.38
0.55
V
VOL
VCC = 4.5 V
IOL = 64 mA
0.42
0.55
V
II
VCC = 5.5 V,
VI = 5.5 V
0.4
mA
IIH
VCC = 5.5 V,
VI = 2.7 V
20
A
IIL
VCC = 5.5 V,
VI = 0.5 V
0.6
mA
IOS
VCC = 5.5 V,
VO = 0
100
225
100
225
mA
IOZH
VCC = 5.5 V,
VO = 2.7 V
50
A
IOZL
VCC = 5.5 V,
VO = 0.5 V
50
A
ICCL
VCC = 5.5 V,
Outputs open
38.1
62
38.1
62
mA
ICCH
VCC = 5.5 V,
Outputs open
4.9
8
4.9
8
mA
ICCZ
VCC = 5.5 V,
Outputs open
4.5
8
4.9
8
mA
Ci
VCC = 5 V,
VI = 2.5 V or 0.5 V
5.5
pF
Co
VCC = 5 V,
VO = 2.5 V or 0.5 V
7.5
pF
All typical values are at VCC = 5 V, TA = 25°C.
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
VCC = 5 V,
TA = 25°C
SN54BCT574
SN74BCT574
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
fclock
Clock frequency
77
MHz
tw
Pulse duration, CLK high or low
6.5
ns
t
Setup time data before CLK
↑
High
4.5
ns
tsu
Setup time, data before CLK
↑
Low
6
ns
th
Hold time, data after CLK
↑
High or low
0
1
0
ns