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參數(shù)資料
| 型號： | SNJ54AHC595W |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | 8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS |
| 中文描述： | 8位移位寄存器3態(tài)輸出寄存器 |
| 文件頁數(shù)： | 6/17頁 |
| 文件大小： | 446K |
| 代理商： | SNJ54AHC595W |
SCLS373I MAY 1997 REVISED JUNE 2004
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25
°
C
TYP
SN54AHC595
MIN
1.9
SN74AHC595
MIN
1.9
UNIT
MIN
1.9
MAX
MAX
MAX
2 V
2
IOH = 50 A
3 V
2.9
3
2.9
2.9
VOH
4.5 V
4.4
4.5
4.4
4.4
V
IOH = 4 mA
IOH = 8 mA
3 V
2.58
2.48
2.48
4.5 V
3.94
3.8
3.8
2 V
0.1
0.1
0.1
IOL = 50 A
3 V
0.1
0.1
0.1
VOL
4.5 V
0.1
0.1
0.1
V
IOL = 4 mA
3 V
0.36
0.5
0.44
IOL = 8 mA
VI = 5.5 V or GND
VI = VCC or GND,
VO = VCC or GND,
OE = VIH or VIL
VI = VCC or GND,
VI = VCC or GND
VO = VCC or GND
4.5 V
0.36
0.5
0.44
II
0 V to 5.5 V
±
0.1
±
1*
±
1
A
IOZ
QAQH
5.5 V
±
0.25
±
2.5
±
2.5
A
ICC
Ci
Co
IO = 0
5.5 V
4
40
40
A
5 V
3
10
10
pF
5 V
5.5
pF
* On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.
timing requirements over recommended operating free-air temperature range,
V
CC
= 3.3 V
±
0.3 V (unless otherwise noted) (see Figure 1)
TA = 25
°
C
MIN
5
SN54AHC595
MIN
5
SN74AHC595
MIN
5
UNIT
MAX
MAX
MAX
SRCLK high or low
tw
Pulse duration
RCLK high or low
5
5
5
ns
SRCLR low
SER before SRCLK
↑
SRCLK
↑
before RCLK
↑
SRCLR low before RCLK
↑
SRCLR high (inactive) before SRCLK
↑
SER after SRCLK
↑
5
5
5
3.5
3.5
3.5
tsu
Setup time
8
8.5
8.5
ns
8
9
9
3
3
3
th
Hold time
1.5
1.5
1.5
ns
This setup time allows the storage register to receive stable data from the shift register. The clocks can be tied together, in which case the shift
register is one clock pulse ahead of the storage register.
2
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