參數(shù)資料
型號(hào)： SNJ54ACT534J
廠商： TEXAS INSTRUMENTS INC
元件分類(lèi)： 總線收發(fā)器
英文描述： ACT SERIES, 8-BIT DRIVER, INVERTED OUTPUT, CDIP20
封裝： CERAMIC, DIP-20
文件頁(yè)數(shù)： 20/25頁(yè)
文件大小： 1009K
代理商： SNJ54ACT534J
SN54ACT534, SN74ACT534
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCAS556C – NOVEMBER 1995 – REVISED NOVEMBER 2002
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
TA = 25°C
SN54ACT534
SN74ACT534
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
fclock
Clock frequency
100
85
120
MHz
tw
Pulse duration, CLK high or low
3.5
5
3.5
ns
tsu
Setup time, data before CLK
↑
3.5
5
4
ns
th
Hold time, data after CLK
↑
1
3
1.5
ns
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
TA = 25°C
SN54ACT534
SN74ACT534
UNIT
PARAMETER
(INPUT)
(OUTPUT)
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
fmax
100
85
120
MHz
tPLH
CLK
Q
2.5
11.5
1.5
14
2
12.5
ns
tPHL
CLK
Q
2
10.5
1.5
13
2
12
ns
tPZH
OE
Q
2.5
12
1.5
14
2
12.5
ns
tPZL
OE
Q
2
11
1.5
13
2
11.5
ns
tPHZ
OE
Q
1.5
12.5
1.5
14.5
1
13.5
ns
tPLZ
OE
Q
1.5
10.5
1.5
11.5
1
10.5
ns
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
TYP
UNIT
Cpd
Power dissipation capacitance
CL = 50 pF,
f = 1 MHz
40
pF
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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