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參數(shù)資料
| 型號： | SNJ54ABT853FK |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ABT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, CQCC28 |
| 封裝： | CERAMIC, LCC-28 |
| 文件頁數(shù)： | 12/20頁 |
| 文件大?。?/td> | 605K |
| 代理商： | SNJ54ABT853FK |
SN54ABT853, SN74ABT853
8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS
SCBS198F – FEBRUARY 1991 – REVISED OCTOBER 1997
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description (continued)
The SN54ABT853 is characterized for operation over the full military temperature range of –55
°C to 125°C. The
SN74ABT853 is characterized for operation from –40
°C to 85°C.
FUNCTION TABLE
INPUTS
OUTPUTS AND I/Os
OEB
OEA
CLR
LE
Ai
Σ OF H
Bi
Σ OF H
A
B
PARITY
ERR
FUNCTION
L
H
X
Odd
NA
A
L
NA
A data to B bus and
L
H
X
Even
NA
A
H
NA
generate parity
H
L
X
L
NA
Odd
B
NA
H
B data to A bus and
H
L
X
L
NA
Even
B
NA
L
check parity
H
L
H
NA
X
NA
NC
Store error flag
X
L
H
X
NA
H
Clear error flag register
H
X
NC
§
H
LH
X
Z
H
Isolation§
H
X
L
L Odd
X
Z
H
(parity check)
X
L
H Even
L
X
Odd
NA
A
H
NA
A data to B bus and
L
X
Even
NA
A
L
NA
generate inverted parity
NA = not applicable, NC = no change, X = don’t care
Summation of high-level inputs includes PARITY along with Bi inputs.
Output states shown assume ERR was previously high.
§ In this mode, ERR (when clocked) shows inverted parity of the A bus.
logic symbol
ERR
CLR
OEA
OEB
CLR
11
1
2
A1
3
A2
4
A3
5
A4
10
PARITY
15
PARITY
B5
19
B6
18
B7
17
B8
16
8
OEA
1
OEB
14
6
A5
7
A6
8
A7
8
9
A8
B1
23
1
B2
22
B3
21
B4
20
ERR
Φ
A Bus
B Bus
LE
13
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the DB, DW, JT, NT, PW, and W packages.
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相關代理商/技術參數(shù) |
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