參數(shù)資料
型號(hào)： SN75LVDS83BDGG
廠商： Texas Instruments
文件頁(yè)數(shù)： 2/30頁(yè)
文件大小： 0K
描述： IC FLATLINK TRANSMITTER 56TSSOP
標(biāo)準(zhǔn)包裝： 35
系列： FlatLink™
類型： 發(fā)射器
驅(qū)動(dòng)器/接收器數(shù)： 5/0
規(guī)程： LVDS
電源電壓： 3 V ~ 3.6 V
安裝類型： 表面貼裝
封裝/外殼： 56-TFSOP（0.240"，6.10mm 寬）
供應(yīng)商設(shè)備封裝： 56-TSSOP
包裝： 管件
產(chǎn)品目錄頁(yè)面： 907 (CN2011-ZH PDF)
其它名稱： 296-24552-5
SLLS846B – MAY 2009 – REVISED SEPTEMBER 2011
SWITCHING CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP(1)
MAX
UNIT
Delay time, CLKOUT
↑ after Yn valid
t0
(serial bit position 0, equal D1, D9,
-0.1
0
0.1
ns
D20, D5)
Delay time, CLKOUT
↑ after Yn valid
t1
(serial bit position 1, equal D0, D8,
1/
7 tc - 0.1
1/
7 tc + 0.1
ns
D19, D27)
Delay time, CLKOUT
↑ after Yn valid
t2
(serial bit position 2, equal D7, D18,
2/
7 tc - 0.1
2/
7 tc + 0.1
ns
D26. D23)
Delay time, CLKOUT
↑ after Yn valid
See Figure 7, tC = 10ns,
t3
(serial bit position 3; equal D6, D15,
3/
7 tc - 0.1
3/
7 tc + 0.1
ns
|Input clock jitter| < 25ps (2)
D25, D17)
Delay time, CLKOUT
↑ after Yn valid
t4
(serial bit position 4, equal D4, D14,
4/
7 tc - 0.1
4/
7 tc + 0.1
ns
D24, D16)
Delay time, CLKOUT
↑ after Yn valid
t5
(serial bit position 5, equal D3, D13,
5/
7 tc - 0.1
5/
7 tc + 0.1
ns
D22, D11)
Delay time, CLKOUT
↑ after Yn valid
t6
(serial bit position 6, equal D2, D12,
6/
7 tc - 0.1
6/
7 tc + 0.1
ns
D21, D10)
tc(o)
Output clock period
tc
ns
tC = 10ns; clean reference clock, see
±26
tC = 10ns with 0.05UI added noise
±44
modulated at 3MHz, see Figure 8
Δtc(o)
Output clock cycle-to-cycle jitter (3)
ps
tC = 7.4ns; clean reference clock,
±35
tC = 7.4ns with 0.05UI added noise
±42
modulated at 3MHz, see Figure 8
High-level output clock pulse
tw
4/
7 tc
ns
duration
Differential output voltage transition
tr/f
225
500
ps
time (tr or tf)
Enable time, SHTDN
↑ to phase lock
ten
f(clk) = 135MHz, See Figure 9
6
s
(Yn valid)
Disable time, SHTDN
↓ to off-state
tdis
f(clk) = 135MHz, See Figure 10
7
ns
(CLKOUT high-impedance)
(1)
All typical values are at VCC = 3.3 V, TA = 25°C.
(2)
|Input clock jitter| is the magnitude of the change in the input clock period.
(3)
The output clock cycle-to-cycle jitter is the largest recorded change in the output clock period from one cycle to the next cycle observed
over 15,000 cycles.Tektronix TDSJIT3 Jitter Analysis software was used to derive the maximum and minimum jitter value.
THERMAL CHARACTERISTICS
ZQL
DGG
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
MIN
TYP
MAX
Low-K JEDEC test board, 1s (single signal layer), no air flow
85
Junction-to-free-air
θJA
°C/W
High-K JEDEC test board, 2s2p (double signal layer, double
thermal resistance
67.1
63.4
buried power plane), no air flow
Junction-to-case
θJC
Cu cold plate measurement process
25.2
15.9
°C/W
thermal resistance
Junction-to-board
θJB
EIA/JESD 51-8
31.0
32.5
°C/W
thermal resistance
Junction-to-top of
ψJT
EIA/JESD 51-2
0.8
0.4
°C/W
package
10
Copyright 2009–2011, Texas Instruments Incorporated
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SN75LVDS83BDGG 制造商:Texas Instruments 功能描述:IC FLATLINK TRANSMITTER 3.6V TSSOP-56 制造商:Texas Instruments 功能描述:IC, FLATLINK TRANSMITTER, 3.6V, TSSOP-56
SN75LVDS83BDGGR 功能描述:總線發(fā)射器 FlatLink 10-135MHz Transmitter RoHS:否 制造商:Texas Instruments 數(shù)據(jù)速率:135 Mpps 接口: 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSSOP-56 封裝:Reel
SN75LVDS83BZQLR 功能描述:總線發(fā)射器 FlatLink 10-135MHz Transmitter RoHS:否 制造商:Texas Instruments 數(shù)據(jù)速率:135 Mpps 接口: 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSSOP-56 封裝:Reel
SN75LVDS83CZQLR 功能描述:顯示接口集成電路 FlatLink 10-85MHz Transmitter RoHS:否 制造商:Texas Instruments 電源電流:125 mA 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:WQFN-60 封裝:Reel
SN75LVDS83DGG 功能描述:總線發(fā)射器 Flatlink RoHS:否 制造商:Texas Instruments 數(shù)據(jù)速率:135 Mpps 接口: 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSSOP-56 封裝:Reel
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