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參數(shù)資料
| 型號： | SN74SSTL32867GKER |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 鎖存器 |
| 英文描述： | SSTL SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA96 |
| 封裝： | PLASTIC, FBGA-96 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大小： | 431K |
| 代理商： | SN74SSTL32867GKER |
SN74SSTL32867
26-BIT REGISTERED BUFFER
WITH SSTL_2 INPUTS AND LVCMOS OUTPUTS
DESIGN GOAL
SCES240A – APRIL 1999 – REVISED MAY 1999
6–21
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Member of the Texas Instruments
Widebus
Family
D Supports SSTL_2 Signal Data Inputs
D Supports LVTTL Switching Levels on the
RESET Pin
D Flow-Through Architecture Optimizes PCB
Layout
D Differential CLK Signal
D Advanced ULTTL Output Circuitry
Eliminates Switching Noise in
Unterminated Line
D Packaged in Plastic Fine-Pitch
Ball-Grid-Array Package
description
This 26-bit registered buffer is designed for 2.3-V to 2.7-V VCC operation and SSTL_2 input and unterminated
LVCMOS-output applications.
Data flow from A to Y is controlled by differential clock (CLK, CLK) inputs and the LVTTL reset (RESET) input.
Data are triggered on the positive edge of the positive clock (CLK). The negative clock (CLK) is used to maintain
noise margins. When RESET is low, all registers are reset, and all outputs are low.
To ensure defined outputs from the register before a stable clock has been supplied, RESET must be held in
the low state during power up.
The SN74SSTL32867 is characterized for operation from 0
°C to 70°C.
terminal assignments
12
34
5
6
A
A1
VCC
GND
VDDQ
Y1
Y2
B
A3
A2
VREF
GND
Y3
Y4
C
A5
A4
NC
GND
Y5
Y6
D
A7
A6
GND
VDDQ
Y7
Y8
E
A9
A8
VCC
GND
Y9
VDDQ
F
A11
A10
GND
VDDQ
Y10
GND
G
A13
A12
VCC
VDDQ
Y12
Y11
H
A15
A14
GND
Y13
J
CLK
NC
GND
Y14
K
CLK
RESET
VCC
VDDQ
Y15
Y16
L
A16
A17
GND
VDDQ
Y17
GND
M
A18
A19
VCC
GND
Y18
VDDQ
N
A20
A21
GND
VDDQ
Y20
Y19
P
A22
A23
NC
GND
Y22
Y21
R
A24
A25
NC
GND
Y24
Y23
T
A26
VCC
GND
VDDQ
Y26
Y25
PRODUCT
PREVIEW
DESIGN GOAL
Copyright
1999, Texas Instruments Incorporated
Widebus is a trademark of Texas Instruments Incorporated.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
GKE PACKAGE
(TOP VIEW)
J
H
G
F
E
D
C
B
A
2
13
4
6
5
P
N
M
L
K
T
R
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SN74SSTU32864CGKER | 功能描述:寄存器 25-Bit Configurable Registered Buffer RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| SN74SSTU32864CZKER | 功能描述:緩沖器和線路驅(qū)動器 25-Bit Configurable Registered Buffer RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74SSTU32864DGKER | 功能描述:緩沖器和線路驅(qū)動器 25-Bit Configurable Registered Buffer RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74SSTU32864DZKER | 功能描述:緩沖器和線路驅(qū)動器 25-Bit Configurable Registered Buffer RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74SSTU32864EZKER | 功能描述:寄存器 25-Bit Configurable Registered Buffer RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
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