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參數(shù)資料
| 型號(hào)： | SN74LVTH374PWRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類(lèi)： | 總線收發(fā)器 |
| 英文描述： | LVT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 封裝： | GREEN, PLASTIC, TSSOP-20 |
| 文件頁(yè)數(shù)： | 12/19頁(yè) |
| 文件大?。?/td> | 689K |
| 代理商： | SN74LVTH374PWRG4 |
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SN54LVTH374, SN74LVTH374
3.3V ABT OCTAL EDGETRIGGERED DTYPE FLIPFLOPS
WITH 3STATE OUTPUTS
SCBS683H MARCH 1997 REVISED OCTOBER 2003
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus
lines without need for interface or pullup components.
OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUT
OE
CLK
D
OUTPUT
Q
L
↑
H
L
↑
LL
L
H or L
X
Q0
H
X
Z
logic diagram (positive logic)
OE
To Seven Other Channels
1
11
3
2
CLK
1D
C1
1D
1Q
相關(guān)PDF資料 |
PDF描述 |
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| SN74LVTH540PWRG4 | LVT SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO20 |
| SN74LVTH540DWG4 | LVT SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO20 |
| SN74LVTH541DBLE | LVT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| SN74LVTH541PWLE | LVT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| SN74LVTH543DGVRE4 | LVT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74LVTH540DBR | 功能描述:緩沖器和線路驅(qū)動(dòng)器 Tri-State ABT Octal RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74LVTH540DBRE4 | 功能描述:緩沖器和線路驅(qū)動(dòng)器 3.3V ABT Octal Buff/Drv W/3-St Otpt RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74LVTH540DBRG4 | 功能描述:緩沖器和線路驅(qū)動(dòng)器 3.3V ABT Octal Buffers Drivers RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74LVTH540DW | 功能描述:緩沖器和線路驅(qū)動(dòng)器 Tri-State ABT Octal RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74LVTH540DWE4 | 功能描述:緩沖器和線路驅(qū)動(dòng)器 3.3V ABT Octal Buff/Drv W/3-St Otpt RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
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