參數(shù)資料
型號: SN74LVTH16245BDLR
廠商: TEXAS INSTRUMENTS INC
元件分類: 總線收發(fā)器
英文描述: LVT SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48
封裝: PLASTIC, SSOP-48
文件頁數(shù): 2/11頁
文件大?。?/td> 159K
代理商: SN74LVTH16245BDLR
Features
tied to V
CC through a pullup resistor; the minimum value of the resistor is determined by the
current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using I
off and power-up 3-
state. The I
off circuitry disables the outputs, preventing damaging current backflow through
the devices when they are powered down. The power-up 3-state circuitry places the outputs
in the high-impedance state during power up and power down, which prevents driver
conflict.
The SN54LVTH16245A is characterized for operation over the full military temperature
range of -55°C to 125°C. The SN74LVTH16245B is characterized for operation from -40°C
to 85°C.
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Members of the Texas Instruments WidebusTM Family
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State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation
and Low Static-Power Dissipation
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Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V
V
CC)
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Support Unregulated Battery Operation Down to 2.7 V
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Distributed V
CC and GND Pins Minimize High-Speed Switching Noise
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Flow-Through Architecture Optimizes PCB Layout
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Typical V
OLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
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I
off and Power-Up 3-State Support Hot Insertion
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Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
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Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II (SN74LVTH16245B
Only)
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ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101) (SN74LVTH16245B Only)
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Package Options Include Plastic Shrink Small-Outline (DL), Thin Shrink Small-
Outline (DGG), and Thin Very Small-Outline (DGV) Packages and 380-mil Fine-
Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings
Widebus is a trademark of Texas Instruments Incorporated.
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