參數(shù)資料
型號(hào)： SN74LVCH8T245DBR
廠商： TEXAS INSTRUMENTS INC
元件分類： 總線收發(fā)器
英文描述： LVC/LCX/Z SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO24
封裝： GREEN, PLASTIC, SSOP-24
文件頁(yè)數(shù)： 12/22頁(yè)
文件大?。?/td> 755K
代理商： SN74LVCH8T245DBR
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
DIR
OE
A1
B1
To Seven Other Channels
2
3
22
21
8-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES637A – AUGUST 2005 – REVISED FEBRUARY 2007
The SN74LVCH8T245 is designed for asynchronous communication between two data buses. The logic levels
of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the
A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A
bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port
outputs are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or
LOW level applied to prevent excess ICC and ICCZ.
The SN74LVCH8T245 is designed so that the control pins (DIR and OE) are supplied by VCCA.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown
resistors with the bus-hold circuitry is not recommended.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance
state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE(1)
(EACH 8-BIT SECTION)
CONTROL INPUTS
OUTPUT CIRCUITS
OPERATION
OE
DIR
A PORT
B PORT
L
Enabled
Hi-Z
B data to A bus
L
H
Hi-Z
Enabled
A data to B bus
H
X
Hi-Z
Isolation
(1)
Input circuits of the data I/Os are always active.
LOGIC DIAGRAM (POSITIVE LOGIC)
2
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SN74LVCH8T245DGVR 功能描述:轉(zhuǎn)換 - 電壓電平 8B Dual Supply Bus Transceiver RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8
SN74LVCH8T245DWR 功能描述:轉(zhuǎn)換 - 電壓電平 8B Dual Supply Bus Transceiver RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8
SN74LVCH8T245NSR 功能描述:轉(zhuǎn)換 - 電壓電平 8B Dual Supply Bus Transceiver RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8
SN74LVCH8T245PW 功能描述:轉(zhuǎn)換 - 電壓電平 8B Dual Supply Bus Transceiver RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8
SN74LVCH8T245PWE4 功能描述:轉(zhuǎn)換 - 電壓電平 8B Dual Supply Bus Transceiver RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8
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