參數(shù)資料
型號: SN74LVC241ADBR
廠商: TEXAS INSTRUMENTS INC
元件分類: 總線收發(fā)器
英文描述: LVC/LCX/Z SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO20
封裝: SSOP-20
文件頁數(shù): 1/8頁
文件大小: 125K
代理商: SN74LVC241ADBR
SN74LVC241A
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS343E – MARCH 1994 – REVISED JUNE 1998
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D EPIC (Enhanced-Performance Implanted
CMOS) Submicron Process
D Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA = 25°C
D Typical VOHV (Output VOH Undershoot)
> 2 V at VCC = 3.3 V, TA = 25°C
D Power Off Disables Outputs, Permitting
Live Insertion
D Supports Mixed-Mode Signal Operation on
All Ports (5-V Input/Output Voltage With
3.3-V VCC)
D Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages
description
This octal buffer/line driver is designed for 1.65-V to 3.6-V VCC operation.
The SN74LVC241A is designed specifically to improve both the performance and density of 3-state
memory-address drivers, clock drivers, and bus-oriented receivers and transmitters. Together with the
’LVC240A and ’LVC244A, these devices provide the choice of selected combinations of inverting and
noninverting outputs, symmetrical OE (active-low output-enable) inputs, and complementary OE and
OE inputs.
The SN74LVC241A is organized as two 4-bit line drivers with separate output-enable (1OE, 2OE) inputs. When
1OE is low or 2OE is high, the device passes data from the A inputs to the Y outputs. When 1OE is high or 2OE
is low, the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is
determined by the current-sinking or the current-sourcing capability of the driver.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
The SN74LVC241A is characterized for operation from –40
°C to 85°C.
PRODUCT
PREVIEW
Copyright
1998, Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
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1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
VCC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
DB, DW, OR PW PACKAGE
(TOP VIEW)
相關(guān)PDF資料
PDF描述
SN74LVC241DW LVC/LCX/Z SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO20
SN74LVC244PW LVC/LCX/Z SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO20
SN74LVC244DB LVC/LCX/Z SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO20
SN74LVC257D LVC/LCX/Z SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16
SN74LVC258DR LVC/LCX/Z SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, INVERTED OUTPUT, PDSO16
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